4th International Summer School Sample Clauses

4th International Summer School. 2008 The fourth summer school was organised at the premises of Telecom Italia Learning Services (Tils), in L‟Aquila, Italy. The Summer School started on July 13 and ended on July 19. The 2008 Summer School was supported by HiPEAC1. One of the strengths of the Summer School is the location. Situated in the beautiful L‟Aquila, the infrastructure provided by Telecom Italia is ideal for the vision we have for the Summer School. Next to the spacious and modern classrooms, the location provides the participants ideal opportunities to meet and network. Separate meeting rooms are available, as well as opportunities to relax and have well appreciated social events. Another strong point of this location is that it is at a remote location. All attendants, teachers and organisation stay in the same venue during the entire week, tremendously increasing the opportunities for interaction. Having senior researchers and the Summer School teachers available during the whole week is a major advantage of the summer school. The Summer School program consists of 12 courses, covering the research domains our network is focused on. As mentioned earlier, the clusters suggest the teachers for the Summer School. Apart from the courses, the Summer School also offers a keynote speech, as wel as an invited talk from industry. We adjust the program‟s focus based on the feedback we receive from the participants. The 2008 Summer School courses where: Lecturer Course title Slot 1 Xxxx Xxx Xxxxx Dynamic, Path and Model-Based Code Optimizations Xxxxxxxx Xxxxxxxxxxx Low Power System Design Xxxxx Xxxxxxxxx Multiprocessor Architectures for Speculative Multithreading Slot 2 Xxxxx Xxxx Bus-based On-Chip Communication Architectures Xxxxx Xxxxx Automatic Customization of Embedded Processors Xxxx Xxxxxxx Multicore and multithreaded processor architectures Slot 3 Xxxx Xxxxxx Communication-dominated architectures: toward Networks on Chip Xxxxx Xxxxxxx Bridging the Processor Memory Performance Gap Xxxxxxxx Xxx Xxxxx Virtualization Technologies Slot 4 Xxxx Xxxxx Multiprocessor Interconnection Networks; Routing, Fault Tolerance and Scalabilty Xxxxxxxx Xxxxxxxxx Transactional Memory: Concepts, Implementations, and Opportunities Xxxxx Xxx Reconfigurable Technology and Custom Computing The keynote was given by Xxxx Xxxx (University of Texas at Austin). It was titled “The Multi-core Era: What does it mean? (and even more importantly, what does it NOT mean?)”. The invited talk was given by Xxxxx Xxxxxxxxx (fo...