Global Alarm Pin Sample Clauses

Global Alarm Pin. Global Alarm Pin (GLB_ALRMn) is an output pin to the Host, operating with active-low logic. When GLB_ALRMn is asserted (driven low), it indicates that a Fault/Alarm/Warning/Status (FAWS) condition has occurred. It is driven by the logical OR of all fault/status/alarm/warning conditions latched in the latched registers. Masking Registers are provided so that GLB_ALRMn may be programmed to assert only for specific fault/alarm/warning/status conditions. It is recommended that the Host board be designed to support a high priority event handling service to respond to the assertion of this pin. Upon the assertion (driven low) of this pin, the Host event handler identifies the source of the fault by reading the latched registers over the MDIO interface. The reading action clears the latched registers which in turn causes the CFP to de-assert (releases) the GLB_ALRMn pin.
Sample 1Sample 2Sample 3
Global Alarm Pin. Global Alarm Pin (GLB_ALRMn) is an output pin to the Host, operating with active-low logic. When GLB_ALRMn is asserted (driven low), it indicates that a fault/warning/alarm/status condition has occurred. It is driven by the logical OR of all fault/status/alarm/warning conditions latched in the latched registers. Masking Registers are provided so that GLB_ALRMn may be programmed to assert only for specific fault/alarm/warning/status conditions. It is recommended that the Host board be designed to support a high priority event handling service to respond to the assertion of this pin. Upon the assertion (driven low) of this pin, the Host event handler identifies the source of the fault by reading the latched registers over the MDIO interface. The reading action clears the latched registers which in turn causes the CFP to de-assert (drive high) the GLB_ALRMn pin. Fault Occurrence Normal GLB_ALRMn Output GLB_ALRMn_off GLB_ALRMn_on For more detail on the GLB_ALRMn pin please refer to the CFP MSA : MDIO Management Interface DRAFT.
Sample 1

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