Optional Monitor Clock Characteristics Min. Typ. Max. Unit Notes Impedance Zd 80 100 120 ȍ Frequency See Table 4-4 Output Differential Voltage VDIFF 400 1200 mV Peak to Peak Differential Clock Duty Cycle 40 60 % Table 4-4: CFP8 Module Clocking Signals Clock Name Status I/O M x 26.5625 Gb/s NRZ or M x 26.5625 GBd XXX-4 Default Host Lane Rate Optional Rate REFCLK Optional I 1/170 (156.25 MHz) MCLK Optional O 1/8 (3.3203 GHz) Or 1/48 (553.385 MHz) or 1/64 (415.039 MHz) Clock Name Status I/O M x 25 Gb/s Default Host Lane Rate Datacom Up to 4 x 100GBASE- SR4/LR4/ER4 Telecom Up to 4 x OTU4 REFCLK Optional I 1/160 (161.1328 MHz) or 1/40 (644.5313 MHz) 1/160 (174.7031 MHz) or 1/40 (698.8123 MHz) 1/8 (3.2266 GHz) 1/8 (3.49406 GHz) or or 1/32 (805.665 MHz) 1/32 (873.515 MHz) MCLK Optional O or or 1/40 (644.5313 MHz) 1/40 (698.8123 MHz) or or 1/160 (161.1328 MHz) 1/160 (174.7031 MHz)
Appears in 4 contracts
Samples: CFP Multi Source Agreement (Msa), CFP Multi Source Agreement (Msa), Multi Source Agreement