AMENDMENT #4 TO
Exhibit 10.11.4.
[*] = Certain information in this document has been excluded pursuant to Regulation S-K, Item 601(b)(10). Such excluded information is not material and would likely cause competitive harm to the registrant if publicly disclosed.
AMENDMENT #4 TO
STT-MRAM JOINT DEVELOPMENT AGREEMENT
This Amendment #4 (the "Amendment No. 4'') is entered into by and between Everspin Technologies, Inc. ("Everspin"), and GLOBALFOUNDRIES Inc. ("GLOBALFOUNDRIES"), and amends and supplements that certain STT-MRAM Joint Development Agreement between the parties dated October 17, 2014, as amended by amendment Nos. 1-3 (collectively, the "Agreement"). This Amendment No. 4 is effective as of December 31, 2019 (the "Amendment Effective Date").
WHEREAS Everspin and GLOBALFOUNDRIES have agreed to cooperate on the development of a common 12LP MRAM technology pursuant to the terms of a Statement of Work (the "12LP Statement of Work"); and
WHEREAS Everspin and GLOBALFOUNDRIES wish to revise the royalty rates for MRAM products manufactured by GLOBALFOUNDRIES.
Now, THEREFORE, in consideration of the mutual promises contained herein and other good and valuable consideration, the receipt and sufficiency of which is hereby acknowledged, the parties hereby amend the Agreement as follows:
l. All capitalized terms used in this Amendment but not otherwise defined herein shall have the meanings given such terms in the Agreement and, unless otherwise specified, references to Sections refer to Sections of the Agreement.
| 2. | The following shall be added after Section 3.2: |
' 3.2.1 With respect to the l 2LP Statement of Work, in lieu of equally sharing the Project Costs for the 12LP Statement of Work (the "12LP Project Costs"), Everspin will assign engineering resources with the skills and expertise identified in the relevant Statement of Work to perform Joint Development Work at a GLOBALFOUNDRIES facility.
3.2.2 The Parties shall cooperate in seeking (separately and jointly) government funding for the 12LP Project Costs. In the event that Everspin receives government funding for 12LP Project Costs, the Parties will mutually agree upon a revised cost sharing model taking into consideration such government funding."
| 3. | Section 3.8 is deleted in its entirety and replaced with the following: |
"For avoidance of doubt, Project Costs do not include any engineering or product qualification expenses associated solely with Everspin products, the payment for which will be described in a separate Statement of Work and other costs determined by the terms and conditions of the MA
for said products. Everspin will also be solely responsible for any unique development related to Everspin STT-MRAM Devices at the 12nm technology node, the details of which will be.
described in a separate Statement of Work. For purposes of clarification, Project Costs do include those associated with or related to equipment qualification under this Agreement provided that for the 12mn technology node, Everspin would only be solely responsible for costs associated with work performed exclusively at Everspin’ s request."
| 4. | Section 4.10 is deleted in its entirety and replaced with the following: |
"Everspin IP" means Foreground IP that is: (i) created, made, conceived or reduced to practice solely by Everspin or its respective Consultants during the term of this Agreement and in the performance of this Agreement with the exception of Process IP that is Joint IP and (ii) any Joint Invention allocated to Xxxxx pin through the Invention Allocation Procedure."
| 5. | Section 4.21 is deleted in its entirety and replaced with the following: |
'"JOINT IP" means (i) all Foreground IP which does not fall under the definition of either GLOBALFOUNDRIES IP or Everspin IP, wherein GLOBALFOUNDRIES and Everspin and/or their Consultants both made substantial contributions to its development, and (ii) Process IP created, made, conceived or reduced to practice solely by Everspin employees as a result of working at a GLOBALFOUNDRIES facility during the term of this Agreement and in the performance of this Agreement. Where a layout, circuit design, product, technique, material, structure, method, or process consists of multiple parts, elements, or steps, each of which is capable of being subject to a claim of ownership, each such part, element or step will be analyzed separately to determine if it constitutes JOINT IP."
| 6. | A new Section 4.32 is added as follows: |
"4.32. "Process IP" means the Foreground IP related to design rules, design manuals, design rule check and other elements included in the PDK, process modules, recipes, process integration schemes, process flows, tools and associated tool settings used to manufacture semiconductor STT-MRAM Devices. For avoidance of doubt, (a) process modules are individual process steps or short process sequences and (b) recipes are unit process operating programs on the tools, controlling chemical flow, pressure, temperature, etc."
| 7. | Section 7.2.3 is deleted in its entirety and replaced with the following: |
"grant sublicenses thereunder (to the extent contained in the Design Information) to its Customers, contractors, university collaborators and IP providers/EDA vendors, and to such customers' contractors and IP providers/EDA vendors, (collectively, "GLOBALFOUNDRIES Sublicensees"), the sublicenses so granted to be of scope that includes only the Everspin IP that is necessary to design, develop and test, or assist GLOBALFOUNDRIES or GLOBALFOUNDRIES Customers with designing, developing and testing, STT-MRAM Devices to be manufactured solely by GLOBALFOUNDRIES, and that restricts such
GLOBALFOUNDRIES Sublicensees from using such Everspin IP for any purposes other than designing, developing and testing, or assisting GLOBALFOUNDRIES or GLOBALFOUNDRIES Customers with designing, developing and testing, such STT-MRAM Devices. If such GLOBALFOUNDRIES Sublicensees are universities, GLOBALFOUNDRIES will notify Everspin, and any publication related to STT-MRAM design, development or testing allowed under this Section 7.2.3 shall include an acknowledgement to Everspin and/or GLOBALFOUNDRIES as relevant, and"
| 8. | The following shall be added as Section 7.8.1: |
"Solely with respect to Everspin IP and JOINT IP created under SOWs related to 00xx XXX-XXXX or 00xx XXX-XXXX and which is necessary to enable Everspin’ s STT-MRAM roadmap at processing nodes that GLOBALFOUNDRIES does not have in manufacturing, specifically 12" wafer technologies utilizing a DRAM (or DRAM-like) base process for high density STT-MRAM Devices, and/or those used to manufacture any STT-MRAM Devices on an 8" substrate (collectively, ''Non-Competitive Technologies"), the disclosure, disposal and license restrictions on Everspin detailed in Section 7.8 and manufacturing restriction on Everspin products in Section 7.4, above will not apply; provided however that any Everspin product manufactured on these Non- Competitive Technologies is not in competition with the GLOBALFOUNDRIES 40nm STT-MRAM or 28nm STT-MRAM offerings. For avoidance of doubt, Everspin may disclose, Everspin IP and/or JOINT IP at the 40nm and 28nm technology nodes to any foundry to develop STT-MRAM Devices at Non Competitive Technologies but may not disclose or utilize GLOBALFOUNDRIES IP for any purpose nor disclose Everspin IP and/or JOINT IP to any other foundry to develop STT-MRAM Devices at technology nodes other than Non-Competitive Technologies except as otherwise allowed by this Agreement."
| 9. | Section 7.9 is deleted in its entirety and replaced with the following: |
“In addition to a Party's compliance with the non-disclosure and licensing restrictions corresponding to Background IP and Foreground IP as set forth herein, neither Party may disclose, dispose of or license any Foreground IP of the other Party to any cons01iium having a purpose of designing, including research and development with respect to non-bit-cell design, MRAM technology during the Exclusivity Period associated with the relevant STT-MRAM Device except as reasonably necessary to (i) perform the Joint Development Work as a Consultant of GLOBALFOUNDRIES or Everspin or (ii) conduct research. The restriction in this Section 7.9 shall not apply after the Exclusivity Period associated with such Foreground IP has expired."
| 10. | Section 17.1 et seq. is deleted in its entirety and replaced with the following: |
"In the event GLOBALFOUNDRIES manufactures and sells or transfer wafers containing production qualified Embedded STT-MRAM Devices that utilize Design Information to Customers ("Royalty Wafer"), then pursuant to Section 17.4 GLOBALFOUNDRIES shall pay Everspin a royalty percentage of the net selling price, excluding all amounts for bump, packaging, and test, for each Royalty Wafer as shown below ("Royalty Amount").
GLOBALFOUNDRIES' obligation to pay any royalties to Everspin pursuant to this Agreement will terminate when the time period set forth in Section 17.1.2 has passed."
| 11. | Miscellaneous |
All references to the Agreement in any other document shall be deemed to refer to the Agreement as modified by this Amendment No. 4. Except as modified by this Amendment No. 4, all of the terms and conditions of the Agreement shall remain in full force and effect. In the event that the terms of this Amendment No. 4 conflict with the terms of the Agreement, the terms of this Amendment No. 4 shall control.
| 12. | EXECUTION |
This Amendment No. 4 may be executed in any number of counterpart originals, each of which shall be deemed an original instrument for all purposes, but all of which shall comprise one and the same instrument. This Amendment No. 4 may be delivered by electronic mail or facsimile, and a scanned version of this Amendment No. 4 shall be binding as an original.
IN WITNESS WHEREOF, the parties have caused this Amendment to be executed by their duly authorized representatives, effective as of the Amendment Effective Date.
Everspin Technologies, Inc.GLOBALFOUNDRIES Inc.
By: /s/ Xxxxx ConleyBy: /s/ Xxxxx Xxxxxxx
Printed Name: Xxxxx Xxxxxx Printed Name: Xxxxx Xxxxxxx
Title: CEO Title: VP Strategic Agreements
