MASTER PURCHASE AGREEMENT FOR 10 GIGABIT ETHERNET PHYSICAL LAYER DEVICES
EXHIBIT 10.12
[*] = CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED.
MASTER PURCHASE AGREEMENT FOR 10 GIGABIT ETHERNET PHYSICAL LAYER DEVICES
Agreement #: ___________________
Effective Date: 1/15/2009
Expiration Date: 1/15/2019
CNDA #: 4043669
BUYER: | Intel Corporation (and all Intel Subsidiaries and Affiliates, hereinafter “Buyer” or “Intel”). |
0000 Xxxxxxx Xxxxxxx Xxxx |
Xxxxx Xxxxx, XX 00000-0000 |
SUPPLIER: | Aquantia Corporation (hereinafter referred to as “Supplier” or “Aquantia”), |
000 Xxxxxx Xxxxx |
Xxxxxxxx, XX 00000 |
Tel 000.000.0000 |
Addenda attached hereto and | x | Terms and Conditions of Purchase Agreement Services | ||
incorporated herein by reference | x | A. Statement of Work | ||
(Xxxx “X” where applicable): | x | B. Performance Standards | ||
x | C. Supplemental Provisions (Quality) | |||
x | D. Protection of Intel’s Assets |
Recitals
This Master Purchase Agreement for 10 Gigabit Ethernet Physical Layer Devices (“Agreement”) is intended by Buyer and Supplier to provide the governing terms and conditions under which:
1. | Buyer may procure Items consisting of specific types and amounts of 10 Gigabit Ethernet Physical Layer Devices from Supplier at various times over the term of the Agreement. |
2. | Supplier will perform custom work for Buyer relative to the Items. |
This Agreement shall support an unlimited number of Project Statements over its term, each of which will specify the unit pricing, scope of work, and performance standards of a specific type of 10 Gigabit Ethernet Physical Layer Device that Buyer intends to purchase from Supplier. Such Project Statements shall be compiled into Addendum A and referenced in consecutive order (e.g., Project Statement #1 of Addendum A, Project Statement #2 of Addendum A, etc.). All Purchase Orders issued to Supplier by Buyer during the term of this Agreement shall be governed only by the Terms and Conditions of this Agreement notwithstanding any preprinted terms and conditions on Supplier’s acknowledgment or Buyer’s Purchase Order. Any additional or different terms in Supplier’s documents are hereby deemed to be material alterations and notice of objection to and rejection of them is hereby given by Buyer. Any additional or different terms in Buyer’s documents are hereby deemed to be material alterations and notice of objection to and rejection of them is hereby given by Supplier. When Buyer is a subsidiary of Intel, the obligations of the parties run between such subsidiary and the Supplier, and not between Intel Corporation and the Supplier, but any breach by such Intel Subsidiary shall be deemed a breach by Intel Corporation itself.
INTEL | AQUANTIA CORPORATION | |||||||
Signature: | /s/ Xxx Xxxxxxxx | Signature: | /s/ Phil Delansay |
Printed Name: | Xxx Xxxxxxxx | Printed Name: | Phil Delansay |
Title: | VP and GM, LAN Access Xxxxxxx | Title: | President & CEO |
Date: | 1/15/2009 | Date: | January 15, 2009 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
AMENDMENT NO. 1 TO
MASTER PURCHASE AGREEMENT FOR 10 GIGABIT ETHERNET PHYSICAL LAYER DEVICES
AND
PROJECT STATEMENT #1 – [*] PRODUCT
This Amendment No. 1 (the “Amendment”) is entered into as of September 22, 2009 (“Effective Date”), by and between Intel Corporation (“Intel”) and Aquantia Corporation (“Aquantia”) for the purpose of amending the Master Purchase Agreement for 10 Gigabit Ethernet Physical Layer Devices between Intel and Aquantia effective January 15, 2009 (“Master Agreement”) and its Project Statement #1 – [*] Product dated as of January 15, 2009 (the “Project Statement”) (the Master Agreement and the Project Statement are referred to collectively as the “Agreement”).
Whereas, the Project Statement provides for the development of the [*] Product which incorporates Intel’s 10GbE duel MAC with Aquantia’s 10GbE dual PHY, and also provides for a limited license to Aquantia to make, use and sell such product (referred to as the “Aquantia Product”) [*] as provided in the Project Statement and in the Master Agreement;
Whereas, Aquantia wishes to appoint another entity as a second source for Aquantia products, and accordingly, Aquantia wishes to have certain rights under the Agreement extended to such entity acting as Aquantia’s second source and/or clarified, and Intel agrees to such extensions and clarifications pursuant to the terms of this Amendment:
Now, therefore, in consideration of the mutual covenants and premises contained herein, the receipt and sufficiency of which are hereby acknowledged, the parties agree as follows:
1. Effect of Amendment. Except as amended by this Amendment, all terms and conditions of the Agreement shall remain in full force and effect. In the event of a conflict between this Amendment and the Agreement, this Amendment shall control. Capitalized terms not defined herein have the meanings specified in the Agreement.
2. Amendments.
(a) In the Project Statement, the definition of “Aquantia Product” is hereby amended to read as follows:
8.1.2 “Aquantia Product” means [*]. Unless otherwise expressly set forth in this Project Statement, references to “[*] Product” in this Project Statement shall not be construed as including a reference to the Aquantia Product.
(c) A new definition is hereby added to Section 8.1 of the Project Statement as follows:
8.1.11 “Second Source” means a third party, approved by Intel, with whom Aquantia enters into an agreement under which such third party will act as a second source for Aquantia’s customers with respect to the Aquantia Products, which products may be marketed and sold under the branding and marks of such third party.
(d) Section 8.3.3 of the Project Statement is revised to add “(except as provided below)” after “non-sublicensable”.
(e) Section 8.3.3.4 is revised to read as follows:
8.3.3.4 to make and have made, use, import, offer for sale and sell the Aquantia Products, and, upon consent of Intel to sublicense the foregoing rights to the Second Source.
(f) Section 8.4 of the Project Statement is amended to read as follows:
8.4 Have Made Rights. For purposes of exercising its have made rights granted under Section 8.3.3.2 and 8.3.3.4 of this Project Statement (Licensing), Aquantia (and, for the purpose of exercising its sublicense rights under Section 8.3.3.4, its Second Source) may deliver Intel Technology delivered to Aquantia by Intel only to those subcontractors approved in advance in
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
writing by Intel subject to the confidentiality obligations set forth in Section 3.(a) of this Amendment.
3. Consent for Second Source. Intel hereby approves [*] as a Second Source under the following terms and conditions:
(a) Disclosure of Intel Confidential Information. Intel hereby consents to the disclosure of the Intel Confidential Information set forth in Addendum A attached hereto and by this reference made a part hereof. Such disclosure shall be made under an agreement of confidentiality at least as comprehensive as the agreement applicable to each such item of Intel Confidential Information (e.g., the CNDA or any other applicable confidentiality agreement). Aquantia shall be liable to Intel for any breach of such agreement of confidentiality by the Second Source and any such agreement shall name Intel as a third party beneficiary.
(b) Consent to Sublicense: Intel hereby consents to the sublicense under Section 8.3.3.4 to [*] under the following terms and conditions:
(i) Aquantia to disable [*] for the Aquantia Product [*].
(ii) Mask Works made from [*] are defined as [*] will be identified by a [*].
(iii) Except as described in section 3 (d) below, [*] will not order, nor have access to, [*] for the Aquantia Product and [*] will purchase wafers from [*] based on [*].
(iv) For Second Source Aquantia Product, [*] to manage subcon Assembly/Test suppliers.
(v) The sublicense is limited solely to [*] providing second source services to Aquantia customers and markets as defined in and under the terms and conditions of the second source agreement between Aquantia and [*] (“Second Source Agreement”).
(vi) The sublicense shall terminate immediately upon termination of the Second Source Agreement for any reason, provided that, after termination of the Second Source Agreement, the sublicense to [*] shall continue solely to the extent necessary to allow [*] to provide a last time buy if required under the Second Source Agreement (“Continuing Rights”).
(c) Delivery of Intel Technology. Subject to Section 3(a) above, Aquantia may deliver the Intel Technology set forth in Exhibit A to [*] solely for the use by [*] in the performance of the Second Source Agreement. [*] shall return all Intel Technology to Aquantia upon the termination of the Second Source Agreement and expiration of Continuing Rights.
(d) Use of [*]. In the event 1) [*] is unable to fulfill its obligations to supply Aquantia Product under the Second Source Agreement due to [*] which is uncured after [*] notice; and 2) Aquantia is unable or unwilling (other than due to breach of agreement by [*] or [*]) to make the [*] or a suitable replacement available to [*] for the purpose of enabling [*] to supply [*] under the Second Source Agreement, [*] may, at its sole expense procure a replacement set of [*]. [*] shall transfer ownership of the [*] to Intel [*]. Upon ownership transference of the replacement [*] to Intel, Intel shall license [*] to use the [*] to build wafers and sell Aquantia Product to [*] solely to the extent necessary for [*] go fulfill its obligations to [*] under the Second Source Agreement [*]. Intel will not [*]. Intel shall maintain the [*] as Aquantia Confidential Information under the CNDA between the parties.
4. Miscellaneous. The parties mutually acknowledge and agree that this Amendment shall he governed by and construed in accordance with the internal laws of the State of Delaware without regard to conflicts of law provisions thereof. This Amendment represents the entire agreement of the parties with respect to the subject matter hereof and supersedes all prior or contemporaneous agreements, understandings, proposals and representations by the parties and no waiver, modification or amendment shall be valid unless it is set forth in writing and signed by both parties. This Amendment may be executed in any number of counterparts and when so executed and delivered shall have the same force and effect as though all signatures appeared on one document.
IN WITNESS WHEREOF, each party has caused this Amendment to be duly executed as of the Effective Date.
INTEL CORPORATION | AQUANTIA CORPORATION | |||||||
By: | /s/Xxx Xxxxxxxx | By: | /s/ Xxxxx Xxxxxx |
Name: | Xxx Xxxxxxxx | Name: | Xxxxx Xxxxxx |
Title: | VP and GM, LAN Access Division | Title: | CEO |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
Addendum A
Intel Confidential Information and Intel Technology to be Disclosed to [*].
1 - [*]
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
AMENDMENT NO. 2 TO
MASTER PURCHASE AGREEMENT FOR 10 GIGABIT ETHERNET PHYSICAL LAYER DEVICES
AND
PROJECT STATEMENT #1 – [*] PRODUCT
This Amendment No. 2 (the “Amendment”) is entered into as of Dec 15, 2011 (“Effective Date”), by and between Intel Corporation (“Intel” ) and Aquantia Corporation (“Aquantia”) for the purpose of amending the Master Purchase Agreement for 10 Gigabit Ethernet Physical Layer Devices between Intel and Aquantia effective January 15, 2009 (“Master Agreement”) and its Project Statement #1 – [*] Product dated as of January 15, 2009 (the “Project Statement”) (the Master Agreement and the Project Statement are referred to collectively as the “Agreement”).
Whereas, the Project Statement provides for the development of the [*] Product which incorporates Intel’s 10GbE duel MAC with Aquantia’s 10GbE dual PHY, and also provides for a limited license to Aquantia to make, use and sell such product (referred to as the “Aquantia Product”) [*] as provided in the Project Statement and in the Master Agreement;
Whereas, Aquantia wishes to appoint another entity as a second source for Aquantia products, and accordingly, Aquantia wishes to have certain rights under the Agreement extended to such entity acting as Aquantia’s second source and/or clarified, and Intel agrees to such extensions and clarifications pursuant to the terms of this Amendment;
Now, therefore, in consideration of the mutual covenants and premises contained herein, the receipt and sufficiency of which are hereby acknowledged, the parties agree as follows:
1. Effect of Amendment. Except as amended by this Amendment, all terms and conditions of the Agreement shall remain in full force and effect. In the event of a conflict between this Amendment and the Agreement, this Amendment shall control. Capitalized terms not defined herein have the meanings specified in the Agreement.
2. Consent for Second Source. Intel hereby approves [*] as a Second Source under the following terms and conditions:
(a) Disclosure of Intel Confidential Information. Intel hereby consents to the disclosure of the Intel Confidential Information set forth in Addendum A attached hereto and by this reference made a part hereof. Such disclosure shall be made under an agreement of confidentiality at least as comprehensive as the agreement applicable to each such item of Intel Confidential Information (e.g., the CNDA or any other applicable confidentiality agreement). Aquantia shall be liable to Intel for any breach of such agreement of confidentiality by the Second Source and any such agreement shall name Intel as a third party beneficiary.
(b) Consent to Sublicense: Intel hereby consents to the sublicense under Section 8.3.3.4 to [*] – under the following terms and conditions:
(i) Aquantia to disable [*] for the Aquantia Product [*].
(ii) Mask Works made from [*] are defined as [*] will be identified by a [*].
(iii) Except as described in section 3 (d) below, [*] will not order, nor have access to, [*] for the Aquantia Product, and [*] will purchase wafers from [*] based on [*].
(iv) For Second Source Aquantia Product, [*] to manage subcon Assembly/Test suppliers.
(v) The sublicense is limited solely to [*] providing second source services to Aquantia customers and markets as defined in and under the terms and conditions of the second source agreement between Aquantia and [*] (“Second Source Agreement”)
(vi) The sublicense shall terminate immediately upon termination of the Second Source Agreement for any reason, provided that, after termination of the Second Source Agreement, the sublicense to [*] shall continue solely to the extent necessary to allow [*] to provide a last time buy if required under the Second Source Agreement (“Continuing Rights”).
(c) Delivery of Intel Technology. Subject to Section 3(a) above, Aquantia may deliver the Intel Technology set forth in Exhibit A to [*] solely for the use by [*] in the performance of the Second Source Agreement.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
[*] shall return all Intel Technology to Aquantia upon the termination of the Second Source Agreement and expiration of Continuing Rights.
(d) Use of [*]. In the event 1) [*] is unable to fulfill its obligations to supply Aquantia Product under the Second Source Agreement due to the [*] which is uncured after [*] notice; and 2) Aquantia is unable or unwilling (other than due to breach of agreement by [*] or [*]) to make the [*] or a suitable replacement available to [*] for the purpose of enabling [*] to enable [*] to supply [*] under the Second Source Agreement, [*] may, at its sole expense procure a replacement set of [*]. [*] shall transfer ownership of the [*] to Intel [*]. Upon ownership transference of the replacement [*] to Intel, Intel shall license [*] to use the [*] to build wafers and sell Aquantia Product to [*] solely to the extent necessary for [*] go fulfill its obligations to [*] under the Second Source Agreement [*]. Intel will not [*]. Intel shall maintain the [*] as Aquantia Confidential Information under the CNDA between the parties.
3. Miscellaneous. The parties mutually acknowledge and agree that this Amendment shall be governed by and construed in accordance with the internal laws of the State of Delaware without regard to conflicts of law provisions thereof. This Amendment represents the entire agreement of the parties with respect to the subject matter hereof and supersedes all prior or contemporaneous agreements, understandings, proposals and representations by the parties and no waiver, modification or amendment shall be valid unless it is set forth in writing and signed by both parties. This Amendment may be executed in any number of counterparts and when so executed and delivered shall have the same force and effect as though all signatures appeared on one document.
IN WITNESS WHEREOF, each party has caused this Amendment to be duly executed as of the Effective Date.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
INTEL CORPORATION | AQUANTIA CORPORATION | |||||||
By: | /s/ Xxx Xxxxxxxx | By: | /s/ Xxxxx Xxxxxx |
Name: | Xxx Xxxxxxxx | Name: | Xxxxx Xxxxxx |
Title: | VP, IAG & GM, CNG | Title: | CEO |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #1 — [*] PRODUCT
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #1 (“Project Statement”) shall be attached to and incorporated in the “Agreement” as Attachment Number #1. For purposes of this Project Statement #1, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated December 15, as amended to-date. The purpose of this Project Statement #1 is to set forth the terms and conditions under which Aquantia will develop and deliver a 10GbE dual MAC/PHY device (“[*] Product”). The Parties agree that the date of this Project Statement #1 shall be January 15, 2009.
Any changes to the specifications of [*] Product that are set forth in this Project Statement #1 must be agreed to by the Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
Aquantia will combine Intel’s 10GbE dual MAC with Aquantia’s 10GbE dual PHY to create the [*] Product on [*] process. Intel’s dual MAC will be delivered as [*] with Aquantia performing [*] in order to deliver [*] devices to Intel. [*] Product is a custom item.
3. | PRICING |
3.1. In Sample and/or Prototype Units. Upon availability and prior to [*] (or other dates subsequently agreed to by the Parties) Intel may purchase sample or prototype units of [*] Product from Aquantia as follows:
All sample and/or prototype units, regardless of spin (e.g., A0, A1, A2): Aquantia will provide the first 200 samples to Intel at no cost. Intel may purchase additional samples at Aquantia’s “Standard Cost”. “Standard Cost” is defined as [*].
3.2. [*] Units
3.2.1. Purchase Price
3.2.1.1. Intel may purchase [*] at the pricing specified below following its delivery to Aquantia of Intel’s written confirmation that [*] Product has received [*]. Following such notice Intel shall pay Aquantia [*] units delivered to it in keeping with the purchase order terms specified in Sections 3 and 4 of the Master Purchase Agreement. The [*] relevant to any given purchase order shall be the applicable [*] stated in the table below [*] plus [*], calculated as follows: |
[*]. |
3.2.1.2. For the purpose of this Section 3.2, the [*] is defined as [*]. The [*] will be [*] by Intel [*]. |
3.2.2. [*]
3.2.2.1. [*]: |
a) [*]. |
b) [*]. |
c) [*]. |
d) [*]. |
3.2.3. For the purpose of this Section 3.2 units sold to Intel customers shall include units sold directly by Intel or its distributors to its customers as well as units incorporated by or on behalf of Intel into one or more Intel product(s), such as [*] and sold to an Intel customer. In the latter case, the [*] shall be deemed to be the [*]. |
The [*] is listed in the [*] below |
[*] Schedule
Date | 1H 2011 | 2H 2011 | 1H 2012 | 2H 2012 | 2013+ | |||||
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Any changes in the UPC shall be as mutually agreed by the Parties.
[*].
4. | PREPAYMENT, NRE AND EXCHANGE OPTION |
4.1. Prepayment: Intel shall prepay $4,000,000 to Aquantia which will be applied towards [*]. This prepayment shall be fully refundable at Intel’s discretion after January 1, 2010.
Prepaid Payment Schedule: |
Due on:
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[*]
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Payment
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$4,000,000
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Aquantia shall invoice Intel for the foregoing prepayment [*] prior to the payment due date set forth in the table above. Intel shall remit payment on or before the payment due date set forth above, which shall be within [*] of Intel’s receipt of Aquantia’s invoice.
4.2. NRE: Intel shall pay Aquantia for non-recurring engineering expenses (“NRE”) associated with the development of [*]. Intel’s total NRE payment to Aquantia for [*] Product shall be $4,000,000. This includes [*].
[*]. |
[*]. |
NRE Payment Schedule: |
Due on:
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[*]
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Payment
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$4,000,000
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4.3. Aquantia shall invoice Intel for the foregoing NRE payment at least [*] prior to the payment due date set forth in the table above. Intel shall remit payment on or before the payment due date set forth above, which shall be within [*] of Intel’s receipt of Aquantia’s invoice. For the avoidance of doubt, the foregoing NRE payment [*].
5. | DEFINITIONS |
1000BASE-CX | IEEE 802.3z Gigabit Ethernet Standard for short haul copper (up to 25m). | |
1000BASE-LX | IEEE 802.3z Gigabit Ethernet Standard using long wavelength (1300nm) laser, typically over Single mode Fiber. | |
1000BASE-SX | IEEE 802.3z Gigabit Ethernet Standard using short wavelength (850nm) laser, typically over Multi-mode Fiber. | |
1000BASE-T | IEEE 802.3ab Gigabit Ethernet Standard Physical Layer definition for long haul copper (up to 100m) over 4 pair of Category 5 balanced copper cabling. | |
802.3 | IEEE standard that defines CSMA/CD and 10BASE-T. | |
802.3ab | IEEE standard that defines 1000BASE-T. | |
802.3u | IEEE standard that defines 100BASE-TX. | |
802.3z | IEEE standard that defines 1000BASE-CX, 1000BASE-LX, 1000BASE-SX. | |
A0 | A0 is used to indicate the first revision of the silicon. If the next revision only changes metal layer, the number increments (e.g. A1). If all (or most) layers change, the letter increments and the number resets to zero (e.g. B0). | |
AFE | Analog Front End that converts digital signals to analog for input and output on physical interface. | |
AoL | Alert-on-LAN. | |
ASF | Alerting Standards Form. | |
BRD | The library format for Cadence Allegro PCB designs | |
CSMA/CD | Carrier Sense Multiple Access / Collision Detect. This is the type of bus protocol implemented by 802.3 Ethernet. | |
CTE | Cold Temperature Elimination — a method to eliminate the need of testing at cold temperature at high volume production, while still achieving quality / reliability requirements. | |
DAC | Dual Address Cycle. | |
DB | The library format of Synopsys synthesis libraries. | |
DFT | Design For Testability. | |
DMA | Direct Memory Access. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
DRC | Design Rule Check. | |
DSP | Digital Signal Processor. | |
EEPROM | Electrically Erasable Programmable Read Only Memory. | |
EEE | Energy Efficient Ethernet | |
GMAC | Gigabit MAC. | |
GMII | Gigabit Media Independent Interface. | |
GPIO | General Purpose Input/Output. This is a software controllable input/output pin/pad. | |
HDL | Hardware Description Language. | |
HSPICE | Industry standard models for package, analog, circuit simulation. | |
IAS | Integration Architecture Specification – is the overall system specification for Xxxxxx Hills-LM/LC and will be the reference point for all functions and features. | |
IBIS | An industry standard simulation / signal characterization model of IOs. | |
IO | Input/Output. Typically refers to a silicon pin/pad. | |
LOM | LAN-on-Motherboard. | |
LVS | Layout Versus Schematic. | |
MAC | Media Access Controller. The name of the logic that implements the 802.3 CSMA/CD standard. | |
MAC Controller | The logic that provides the MAC function along with DMA and a host interface (e.g. PCI). | |
MII | Media Independent Interface. | |
Modelsim | Model Technology’s HDL simulator product. | |
PCI-Express | Third Generation high performance I/O bus implemented with serial, point-to-point type interconnect for communication between two devices at current data-rate of 2.5 Gbits/sec. AIso known as “PCIE”. | |
PDT | Intel and AQUANTIA Joint Program Development Team. | |
PHY | Physical Layer Device. The device/block that implements the AFE. | |
PPS & PRQ | There are two qualification levels designed to meet Intel’s and its customers’ product introduction and production ramp needs, Pre-Production Samples (PPS) and Production Release Qualification (PRQ). PPS supports the unique and varied demands our businesses have in shipping limited quantities of customer qualification samples. At PRQ, Intel’s objective is to ship unlimited quantity of commercial products that meet the Q&R requirements and are supported by the applicable Intel warranty agreements. | |
PXE | Pre-boot execution Environment. | |
RAM | Random Access Memory. | |
SDF | Standard Delay Format. | |
SerDes | Serializer-Deserializer connection used in Backplane – connection using high speed serial electrical interface, based on IEEE – 1000BaseT-CX; or Fiber interface, IEEE 1000BaseT LX/SX. | |
SKU | Stock Keeping Unit. | |
SPEF | Standard Parasitic Exchange Format | |
Synopsys | Synthesis tool company. xxx.xxxxxxxx.xxx | |
TBI | Ten Bit Interface. | |
UTP | Unshielded Twisted Pair. | |
VCS | Synopsys’s HDL simulator product. | |
Verilog | An industry standard HDL language. | |
WfM 2.0 | Wired for Management 2.0 specification: an Intel initiative to improve manageability of desktop, mobile and server systems, decreasing total cost of ownership. | |
WoL | Wake on LAN: An IBM trademarked term, used in place of Remote Wake Up, which describes the capability of remotely bringing a PC from a low to a high power state. | |
ZOBI | Zero-Hours-Burn-In a method to eliminate the need of burn-in at high volume production while still achieving quality / reliability requirements. |
6. | PROJECT MANAGEMENT |
The Parties agree to assign dedicated project managers, engineering managers, and other personnel to this project as specified below. The project managers will exercise overall project responsibility for their respective Party:
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
Program and Engineering Project Managers
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Intel
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In addition, when applicable, both Parties agree to assign cross-functional team members to the [*] Product project. These members will include employees of each Party representing, but not limited to, the following functions or disciplines:
Analog Engineering (IO cells, PHY, and noise analysis)
Applications Engineering
Board Engineering
CAD Engineering (Layout, DRC)
Customer Support
Digital Engineering (ASIC and CMOS micro-architecture)
Software Engineering
Foundry Support
Manufacturing Test Engineering
Marketing
Operations
Packaging Engineering
Product Engineering
Production Operations and Document Control
Quality & Reliability Engineering
Silicon Validation
7. | TERMINATION |
7.1. [*] Product Project cancellation by Intel for convenience:
Any other section of the Agreement notwithstanding, Intel may terminate this Project Statement for convenience at any time by written notice to Aquantia In lieu of any claim for termination charges provided in Sections 5.B and 5.C of the Agreement, Intel shall pay to Aquantia the remaining unpaid NRE payments under the NRE payment table in Section 4.
7.2. [*] Product project cancellation by Aquantia for convenience:
Aquantia may not terminate this Project Statement for convenience.
8. | INTELLECTUAL PROPERTY AND MARKING |
8.1. Definitions
8.1.1. “Aquantia Field of Use” means (a) physical layer (“PHY”) technology for Ethernet networking technologies, circuit design, modeling and process design methodologies, programs and flows that do not fall within the Intel Field of Use and are not otherwise based in any way on Intel Confidential Information; (b) dynamic back biasing technology that does not fall within the Intel Field of Use and is not otherwise based in any way on Intel Confidential Information, and (c) additional technology, if any, expressly identified in the Project Statement.
8.1.2. “Aquantia Product” means [*].
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.1.3. “Background IP” means all Intellectual Property and Patents belonging to or controlled by either Party, (i) developed, conceived, obtained or acquired prior to the Effective Date of the Agreement or (ii) developed, conceived, obtained or acquired independently of the Agreement or not as part of the approved Project Statement. |
8.1.4. “Intel Field of Use” means (a) media access controller (“MAC”) technology for Ethernet networking technologies; (b) technology related to manufacturing, metrology, testing, inspection, architecture, functionality and/or power management of (i) Processors, (ii) Chipsets and (iv) Intel processor based motherboards; and (c) additional technology, if any, expressly identified in an applicable Project Statement. |
8.1.5. “Intellectual Property” means any and all intellectual property rights including all of the following and all rights in, arising out of, or associated therewith: (i) procedures, designs, inventions, and discoveries; (ii) works of authorship, copyrights and other rights in works of authorship; (iii) mask work rights, and (iv) know-how, show-how and trade secrets on a world wide basis, but excluding all Patents issued or issuable thereon, and all trademarks, trade names, or other forms of corporate or product identification. |
8.1.6. “Patents” means all classes or types of patents (including, without limitation, originals, divisions, continuations, continuations-in-part, extensions, renewals, reexaminations, or reissues), and applications for these classes or types of patent rights in all countries of the world (collectively, “Patent Rights”) that are owned or controlled by the applicable Party during the term of the Agreement. |
8.1.7. “Patent Prosecution” means (i) preparing, filing and prosecuting patent applications (of all types), (ii) maintaining any Patents, and (iii) managing interference, reexamination or opposition proceedings relating to the foregoing. |
8.1.8. “Project” means the development of [*] Product during the term of this Project Statement as part of an approved Project Statement. |
8.1.9. “Project IP” means all Intellectual Property and Patents developed or conceived under this Project Statement by one Party or both Parties as part of an approved Project Statement to develop [*] Products. Project IP does not include the Background IP of either Party. |
8.1.10. “[*] Product” means a product consisting of a single integrated circuit of the integration of Intel’s 10GbE dual MAC with Aquantia’s 10GbE dual PHY described in the approved Project Statement to create [*] Product on [*] process. |
8.2. | Intellectual Property and Patent Ownership |
8.2.1. Background IP. As between the Parties, Intel shall have exclusive ownership of Intel’s Background IP, and Aquantia shall have exclusive ownership of Aquantia’s Background IP. |
8.2.2. Project IP |
8.2.2.1. Any and all Project IP, other than mask work rights, that falls within the Intel Field of Use, whether solely or jointly developed, shall be owned solely by Intel (“Intel Owned IP”). Aquantia hereby assigns to Intel all of the Project IP developed or co-developed by Aquantia pursuant to this Project Statement that falls within the Intel Field of Use. |
8.2.2.2. Any and all Project IP that falls within the Aquantia Field of Use, whether solely or jointly developed, and all mask work rights that are part of the Project IP, shall be owned solely by Aquantia (“Aquantia Owned IP”). Intel hereby assigns to Aquantia all of the Project IP developed or co-developed by Intel pursuant to this Project Statement that falls within the Aquantia Field of Use. |
8.2.2.3. Any Project IP that does not fall within either the Intel Field of Use or the Aquantia Field of Use that is solely conceived by employees of one Party as part of the Project without any contribution, individually or jointly, of employees of the other Party shall be owned solely by the Party whose employees conceived such Project IP. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.2.2.4. Any Project IP that does not fall within either the Intel Field of Use or the Aquantia Field of Use that is jointly conceived by employees of both parties as part of the Project (“Joint Out-of-Field Project IP”) shall be jointly owned. |
8.2.2.5. Subject to the licenses granted in this Project Statement and upon the expressed written approval of the other Party, either Party may at its sole expense file a Patent and carry out Patent Prosecution on any Joint Out-of-Field Project IP and the non-filing Party will assign and hereby does assign to the filing Party all of its ownership interest in such Joint Out-of-Field Project IP and agrees to execute further instruments necessary for Patent Prosecution as reasonably requested by the filing Party. |
8.2.2.6. In the event either Party is unable to obtain the expressed written approval of the other Party pursuant to Section 8.2.2.5 of this Project Statement, such Joint Out-of-Field Project IP will be kept as a jointly-owned trade secret. |
8.2.3. Maskworks |
8.2.3.1. Sections 8.2.1 and 8.2.2 of this Project Statement notwithstanding, Aquantia shall own the mask works for the Aquantia Product and [*] Product (each referred to as “Mask Works”) |
8.2.3.2. The Mask Works may include trade secrets of Intel. In addition and not in lieu of any obligation of confidentiality imposed by the Agreement with respect to Intel Confidential Information, Aquantia will not disclose or otherwise make any part of Mask Works available, in any form, to any person other than Aquantia employees whose job performance requires such access consistent with the exercise of Aquantia’s licenses under Section 8.3.3 of this Project Statement. Aquantia agrees to instruct all such employees on these obligations with respect to use, copying, protection, and confidentiality of Mask Works. |
8.2.3.3. Upon written consent by Intel, Aquantia may deliver the Mask Works to Aquantia subcontractors approved by Intel in writing for the purpose of exercising Aquantia’s rights under Section 8.3.3 of this Project Statement under an obligation of confidentiality at least as protective as that set forth in Section 12 of the Agreement. In the event of the termination of the Agreement, except for breach by Aquantia, pursuant to Aquantia exercising its rights under Section 8.3.3.4 Aquantia may deliver the Mask Works to a mask or wafer fabrication subcontractor approved by Intel in writing, provided Aquantia complies with the conditions in Section 8.5 below. Intel consents to the Mask Works being provided to [*]. |
8.2.3.4. Aquantia may not assign, sublicense, lease, or in any other way transfer or disclose Mask Works to any third party or reproduce or distribute any part of the Mask Works except as expressly provided in this Project Statement. |
8.2.4. GDSII files |
8.2.4.1. Sections 8.2.1 and 8.2.2 of this Project Statement notwithstanding, Aquantia and Intel shall jointly own the GDSII files for the [*] Product. Section 8.6 defines Intel’s right to use the GDSII files to exercise Intel’s make and have made rights for [*] Product. |
8.2.4.2. Each Party shall protect the GDSII files to the same extent as it protects its own similar Intellectual Property. Because the GSDII files contain confidential information of both parties, each Party shall maintain the GDSII files as confidential information of the other Party subject to Section 12 of the Agreement as well as Section 8.6 below |
8.3. | Licensing |
8.3.1. Aquantia grant to Intel. Subject to the terms of the Agreement, Aquantia hereby grants to Intel a royalty-free, non-exclusive, nontransferable, non-sublicensable (except as expressly provided herein), irrevocable, worldwide license under Project IP and Aquantia Background IP used in the development of the [*] Product to: |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.3.1.1. use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product; |
8.3.1.2. disclose (subject to Section 12 of the Agreement), use, copy, have copied, modify and have modified Intellectual Property delivered to Intel by Aquantia as part of a Project Statement solely for the purposes of design validation, bug evaluation and repair of designs using [*] Product; |
8.3.1.3. use [*] Product, and to use, make, have made, sell, offer to sell and import Intel products that incorporate or are otherwise adapted to operate with [*] Product. Intel shall further have the right to extend to direct or indirect customers of Intel a license under all of Aquantia’s Patent rights in the [*] Product to use, sell, offer to sell or import Intel products that incorporate or are otherwise adapted to operate with [*] Product, |
8.3.2. API License. In addition to the licenses set forth above, Aquantia further grants to Intel a royalty free, non-exclusive, irrevocable, worldwide license to copy, display, perform, create derivative works and distribute Aquantia’s API software which will be provided in both object and source code form and which is more fully described in Attachment #2. |
8.3.3. Intel grant to Aquantia. Subject to the terms of the Agreement and for the term of the Agreement, Intel hereby grants to Aquantia a royalty-free, non-exclusive, nontransferable, non-sublicensable, irrevocable (except for breach of the Agreement by Aquantia), worldwide license under Project IP and Intel Background IP used in the development of the [*] Product to: |
8.3.3.1. internally use, copy and have copied the technology delivered to Aquantia by Intel as part of a Project Statement solely for the purposes of developing and supporting the [*] Product as specified in an approved Project Statement solely for the benefit of Intel; |
8.3.3.2. make, have made (subject to Section 8.5 (Consent for Aquantia Products) the [*] Products solely for the benefit of Intel; and |
8.3.3.3. sell the [*] Product only to Intel; and |
8.3.3.4. to make and have made, use, import, offer for sale and sell the Aquantia Product subject to Intel approval provided in Section 8.5 (Consent for Aquantia Products) |
8.3.4. Except as set forth in Section 8.3.3.4 in no event may Aquantia exercise the foregoing license to develop, make, use, sell or otherwise distribute any Intel Background IP or Intel Project IP other than for Intel’s benefit. Aquantia will have no right to make or use the [*] Product for its own use, or to sell the [*] Product to anyone other than Intel. |
8.3.5. The Parties acknowledge that nothing in the foregoing is intended to restrict Aquantia from testing and validating the [*] Products to the extent necessary for the purpose of fulfilling its obligations under the Agreement. |
8.4. Have Made Rights. For purposes of exercising its have made rights granted under Sections 8.3.3.2 and 8.3.3.4 of this Project Statement (Licensing), Aquantia may deliver Intel Technology delivered to Aquantia by Intel only to those subcontractors approved in advance in writing by Intel.
8.5. Consent for Aquantia Products.
8.5.1. Prior to Aquantia’s initial release of the Aquantia Product, Aquantia shall [*] in order to ensure that adequate security has been incorporated to prevent [*] within the Aquantia Product. Upon Intel’s foregoing written approval for the Aquantia Product, Aquantia may exercise its rights under the license granted in Section 8.3.3.4, unless and until Aquantia desires to [*] submit such new method [*]. |
8.5.2. In the event of the termination of the Agreement, Aquantia may exercise its rights under the license granted in Section 8.3.3.4 but only with respect to Aquantia Products [*]. |
8.5.3. In the event of the termination of the Agreement, Aquantia represents and warrants that it will [*]. |
8.6. Continuity of Supply
8.6.1. Forecast and Manufacturing Cycle Time. |
8.6.1.1. Intel will provide Aquantia with a rolling [*] forecast per the Agreement (“Forecast”) and both Aquantia and Intel will mutually agree to [*] for the Aquantia manufacturing cycle which is to be used to [*]. |
8.6.1.2. Aquantia’s manufacturing cycle time (“Manufacturing Cycle Time” or “MCT”) is [*]. |
8.6.2. Subject to the terms of the Agreement, Aquantia grants to Intel a worldwide, nonexclusive, nontransferable, perpetual, irrevocable license to manufacture, or have manufactured, use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product as limited in this Section 8.6. Intel covenants and agrees that it will have the option to exercise the rights granted pursuant to this Section 8.6.2 upon the occurrence of one or more of the Trigger Events set forth in Section 8.6.2.1 below. |
8.6.2.1. A “Trigger Event” is any one of the following events (each, a “Trigger Event”): [*]. |
8.6.2.2. [*]. |
8.6.3. [*]. |
8.6.4. [*]. |
8.7. Product Markings. The [*] Product shall be marked as an Intel-branded device. Aquantia shall meet Intel’s requirements for Intel branded products as required by Intel.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
9. | DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT |
For Aquantia: /s/ [*] | For Intel: | |||||||
[*] | ||||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Phil Delansay | By | /s/ Xxx Xxxxxxxxx | |||||
Printed Name: Phil Delansay | Printed name: Xxx Xxxxxxxxx | |||||||
Title: CEO | Title: Sr. VP & GM, Digital Enterprise Group | |||||||
Date: | January 15, 2009 | Date: | January 15, 2009 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #1 TO PROJECT STATEMENT #1: [*] PRODUCT
REQUIRED FEATURES OF THE [*] PRODUCT
Project Summary:
[*2 pages*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Phil Delansay | By | /s/ Xxx Xxxxxxxxx | |||||
Printed Name: Phil Delansay | Printed name: Xxx Xxxxxxxxx | |||||||
Title: CEO | Title: Sr. VP & GM, Digital Enterprise Group | |||||||
Date: | January 15, 2009 | Date: | January 15 ,2009 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #2 TO [*] PRODUCT PROJECT STATEMENT
STATEMENT OF WORK (“SOW”)
This Attachment #2 describes Key Milestones, deliverables and required dates throughout the Project. Following the effective date of this Project Statement #1, the Parties may choose to revise the content of this Attachment #2, including delivery dates, milestones, etc. as mutually agreed. All such subsequent changes or revisions to these milestones, deliverables and dates are subject to ratification by Intel and Aquantia in meetings held by the Program Managers at Intel and Aquantia, and recorded in the Meeting Minutes and Project Schedule.
Aquantia Deliverables and Milestones
The table below represents a summary of the Aquantia and Intel deliverables, milestones, and associated delivery dates. [*]. Each milestone is briefly defined in the section below the table.
[*].
Section Ref | Deliverable/Milestone | Owner(s) |
Date (DATES TBD, WILL CHANGE!) | |||
(1) |
[*] | Intel/Aquantia | [*] | |||
(2) |
[*] | Intel | [*] | |||
(3) |
[*] | Aquantia | [*] | |||
(4) |
[*] | Intel | [*] | |||
(5) |
[*] | Aquantia | [*] | |||
(6) |
[*] | Intel | [*] | |||
(7) |
[*] | Intel | [*] | |||
(8) |
[*] | Aquantia | [*] | |||
(9) |
[*] | Intel | [*] | |||
(10) |
[*] | Aquantia | [*] | |||
(11) |
[*] | Aquantia | [*] | |||
(12) |
[*] | Aquantia | [*] | |||
(13) |
[*] | Aquantia | [*] | |||
(14) |
[*] | Intel | [*] | |||
(15) |
[*] | Intel/Aquantia | [*] | |||
(16) |
[*] | Intel | [*] | |||
(17) |
[*] | Aquantia | [*] | |||
(18) |
[*] | Intel | [*] | |||
(19) |
[*] | Aquantia | [*] | |||
(20) |
[*] | Aquantia | [*] | |||
(21) |
[*] | Aquantia | [*] | |||
(22) |
[*] | Intel | [*] | |||
(23) |
[*] | Intel/Aquantia | [*] | |||
(24) |
[*] | Intel | [*] |
Milestone Definition
The below section briefly summarizes each milestone listed in above table.
[*2 pages*].
Vendor validation for key components:
[*1 page*]
Aquantia Reference Design Milestones
The following design milestones and associated delivery dates are referenced for the purpose of [*].
AQ1002 (90nm)
Deliverable/Milestone | Target Date | |
Preliminary Results of Intel Defined Electrical/IEEE Testing Matrix (10Gbps) as defined in Appendix C |
Done | |
Preliminary Results of Intel Defined Electrical/IEEE Testing Matrix (1Gbps) as defined in Appendix C |
11/08 | |
Completion of Intel Defined Electrical/IEE Testing Matrix (1Gbps) as defined in Appendix C |
1/09 | |
Completion of Intel Defined Electrical/IEEE Testing Matrix (10Gbps) as defined in Appendix C & FW 1.0 release |
1/09 | |
Launch |
4/09 |
Test Chip 1 (ADC) 40nm
Deliverable/Milestone | Target Date | |
Test Report |
Completed 6/08 |
Test Chip 2 (Band Gap, DAC, LC Clock Synthesizers) 40nm
Deliverable/Milestone | Target Date | |
Tape out |
Completed 4/15/08 | |
Preliminary Test Results |
11/08 |
Test Chip 3 (Band Gap, DAC, LC Clock Synthesizers, ADC, line driver) 40nm
Deliverable/Milestone | Target Date | |
Tape out |
Completed 11/15/08 | |
Preliminary Test Results |
3/09 |
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Phil Delansay | By: | /s/ Xxx Xxxxxxxxx | |||||
Printed Name: Phil Delansay | Printed Name: Xxx Xxxxxxxxx | |||||||
Title: CEO | Title: Sr. VP & GM, Digital Enterprise Group | |||||||
Date: | January 15, 2009 | Date: | January 15, 2009 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #3 TO [*] PRODUCT PROJECT STATEMENT
Quality and Reliability CONFORMANCE REQUIREMENTS
Sample Size May Change Per Risk Assessment
Stress | Lots Total | Units/Lot | PPS Requirement | PRQ Requirement | Notes | |||||
[*3 pages*] |
These Q&R requirements may be adjusted, upon due consideration by both Intel and Aquantia at a peer-to-peer level, or by formal re-negotiation and written acceptance, if so required.
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Phil Delansay | By: | /s/ Xxx Xxxxxxxxx | |||||
Printed Name: Phil Delansay | Printed Name: Xxx Xxxxxxxxx | |||||||
Title: CEO | Title: Sr. VP & GM, Digital Enterprise Group | |||||||
Date: | January 15, 2009 | Date: | January 15, 2009 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #2 – [*] PRODUCT
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #2 (“Project Statement”) shall be attached to and incorporated in the “Agreement” as Attachment Number #2. For purposes of this Project Statement #2, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date. The purpose of this Project Statement #2 is to set forth the terms and conditions under which Aquantia shall develop and deliver a 10GbE dual MAC/PHY device (“[*] Product”). The Parties agree that the date of this Project Statement #2 shall be August 15, 2012.
Any changes to the specifications of [*] Product that are set forth in this Project Statement #2 shall be agreed to by the Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
Aquantia shall combine Intel’s 10GbE dual MAC with Aquantia’s 10GbE dual Aspen PHY to create the [*] Product [*] on [*] process [*]. [*]. Both parties shall mutually agree to complete and approve [*] Tapeout engineering requirements. [*]. Intel and Aquantia shall agree that the [*] shall include features and functions necessary for [*] in order to ensure that [*].
Aquantia shall [*]. Intel’s dual MAC shall be delivered as a [*] with Aquantia performing [*] in order to deliver [*] devices to Intel. [*] Product is a Custom Item.
3. | PRICING |
3.1 Sample and/or Prototype Units. Upon availability and prior to [*] (or other dates subsequently agreed to by the Parties) Intel may purchase sample or prototype units of [*] Product from Aquantia as follows:
3.2 All sample and/or prototype units, regardless of spin (e.g., A0, A1, A2): Aquantia shall provide the first 200 samples to Intel at no cost. Intel may purchase additional samples at [*].
3.3 | [*] Units Purchase Price |
Intel may purchase [*] at the pricing specified below following its delivery to Aquantia of Intel’s written confirmation that [*] Product has received [*]. Following such notice Intel shall place purchase orders [*] units delivered to it in keeping with the purchase order terms specified in Sections 3 and 4 of the Master Purchase Agreement.
[*] Unit Price on Intel purchase orders sent to Aquantia with a delivery date [*] shall be [*].
Prompt payment shall be computed from the latest of:
[*].
3.4 | The [*] below is based on [*]: |
[*]
Any changes in the UP shall be as mutually agreed by the Parties. [*].
4. | [*]. |
5. | DEFINITIONS |
1000BASE-CX | IEEE 802.3z Gigabit Ethernet Standard for short haul copper (up to 25m). | |
1000BASE-LX | IEEE 802.3z Gigabit Ethernet Standard using long wavelength (1300nm) laser, typically over Single mode Fiber. | |
1000BASE-SX | IEEE 802.3z Gigabit Ethernet Standard using short wavelength (850nm) laser, typically over Multi-mode Fiber. | |
1000BASE-T | IEEE 802.3ab Gigabit Ethernet Standard Physical Layer definition for long haul copper (up to 100m) over 4 pair of Category 5 balanced copper cabling. | |
10GBASE-T | IEEE 802.3an | |
802.3 | IEEE standard that defines CSMA/CD and 10BASE-T. | |
802.3ab | IEEE standard that defines 1000BASE-T. | |
802.3u | IEEE standard that defines 100BASE-TX. | |
802.3z | IEEE standard that defines 1000BASE-CX, 1000BASE-LX, 1000BASE-SX. | |
A0 | A0 is used to indicate the first revision of the silicon. If the next revision only changes metal layer, the number increments (e.g. A1). If all (or most) layers change, the letter increments and the number resets to zero (e.g. B0). | |
AFE | Analog Front End that converts digital signals to analog for input and output on physical interface. | |
AoL | Alert-on-LAN. | |
ASF | Alerting Standards Form. | |
BRD | The library format for Cadence Allegro PCB designs | |
CSMA/CD | Carrier Sense Multiple Access / Collision Detect. This is the type of bus protocol implemented by 802.3 Ethernet. | |
CTE | Cold Temperature Elimination – a method to eliminate the need of testing at cold temperature at high volume production, while still achieving quality / reliability requirements. | |
DAC | Dual Address Cycle. | |
DB | The library format of Synopsys synthesis libraries. | |
DFT | Design For Testability. | |
DMA | Direct Memory Access. | |
DRC | Design Rule Check. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
DSP | Digital Signal Processor. | |
EEPROM | Electrically Erasable Programmable Read Only Memory. | |
EEE | Energy Efficient Ethernet | |
GMAC | Gigabit MAC. | |
GMII | Gigabit Media Independent Interface. | |
GPIO | General Purpose Input/Output. This is a software controllable input/output pin/pad. | |
HDL | Hardware Description Language. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
HSPICE | Industry standard models for package, analog, circuit simulation. | |
IAS | Integration Architecture Specification – is the overall system specification for Xxxxxx Hills-LM/LC and shall be the reference point for all functions and features. | |
IBIS | An industry standard simulation / signal characterization model of IOs. | |
IO | Input/Output. Typically refers to a silicon pin/pad. | |
LOM | LAN-on-Motherboard. | |
LVS | Layout Versus Schematic. | |
MAC | Media Access Controller. The name of the logic that implements the 802.3 CSMA/CD standard. | |
MAC Controller | The logic that provides the MAC function along with DMA and a host interface (e.g. PCI). | |
MII | Media Independent Interface. | |
Modelsim | Model Technology’s HDL simulator product. | |
PCI-Express | Third Generation high performance I/O bus implemented with serial, point-to-point type interconnects for communication between two devices at current data-rate of 2.5 Gbits/sec. Also known as “PCIE”. | |
PDT | Intel and AQUANTIA Joint Program Development Team. | |
PHY | Physical Layer Device. The device/block that implements the AFE. | |
POR | Plan of Record. | |
PPS & PRQ | There are two qualification levels designed to meet Intel’s and its customers’ product introduction and production ramp needs, Pre-Production Samples (PPS) and Production Release Qualification (PRQ). PPS supports the unique and varied demands our businesses have in shipping limited quantities of customer qualification samples. At PRQ, Intel’s objective is to ship unlimited quantity of commercial products that meet the Q&R requirements and are supported by the applicable Intel warranty agreements. | |
PXE | Pre-boot execution Environment. | |
RAM | Random Access Memory. | |
SDF | Standard Delay Format. | |
SerDes | Serializer-Deserializer connection used in Backplane – connection using high speed serial electrical interface, based on IEEE – 1000BaseT-CX; or Fiber interface, IEEE 1000BaseT LX/SX. | |
SKU | Stock Keeping Unit. | |
SPEF | Standard Parasitic Exchange Format | |
Synopsys | Synthesis tool company. xxx.xxxxxxxx.xxx | |
TBI | Ten Bit Interface. | |
UTP | Unshielded Twisted Pair. | |
VCS | Synopsys’s HDL simulator product. | |
Verilog | An industry standard HDL language. | |
WfM 2.0 | Wired for Management 2.0 specification: an Intel initiative to improve manageability of desktop, mobile and server systems, decreasing total cost of ownership. | |
WoL | Wake on LAN: An IBM trademarked term, used in place of Remote Wake Up, which describes the capability of remotely bringing a PC from a low to a high power state. | |
ZOBI | Zero-Hours-Burn-In a method to eliminate the need of burn-in at high volume production while still achieving quality / reliability requirements. |
6. | PROJECT MANAGEMENT |
The Parties agree to assign dedicated project managers, engineering managers, and other personnel to this project as specified below. The project managers shall exercise overall project responsibility for their respective Party:
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
Program and Engineering Project Managers
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Intel
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Intel
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In addition, when applicable, both Parties agree to assign cross-functional team members to the [*] Product project. These members shall include employees of each Party representing, but not limited to, the following functions or disciplines:
Analog Engineering (IO cells, PH, and noise analysis)
Applications Engineering
Board Engineering
CAD Engineering (Layout, DRC)
Customer Support
Digital Engineering (ASIC and CMOS micro-architecture)
Software Engineering
Foundry Support
Manufacturing Test Engineering
Marketing
Operations
Packaging Engineering
Product Engineering
Production Operations and Document Control
Quality & Reliability Engineering
Silicon Validation
7. | Termination |
7.1 | [*] Product Project cancellation by Intel for convenience: |
Any other section of the Agreement notwithstanding, Intel may terminate this Project Statement for convenience at any time by written notice to Aquantia.
7.2 | [*] Product project cancellation by Aquantia for convenience: |
Aquantia may not terminate this Project Statement for convenience.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8. | Intellectual Property and Marking |
8.1 | Definitions |
8.1.1 “Aquantia Field of Use” means (i) physical layer (“PHY”) technology for Ethernet networking technologies, circuit design, modeling and process design methodologies, programs and flows that do not fall within the Intel Field of Use and are not otherwise based in any way on Intel Confidential Information; (ii) dynamic back biasing technology that that does not fall within the Intel Field of Use and is not otherwise based in any way on Intel Confidential Information; and (iii) additional technology, if any, expressly identified in the Project Statement.
8.1.2 “Aquantia Product” means [*]
8.1.3 “Background IP” means all Intellectual Property and Patents belonging to or controlled by either Party, (i) developed, conceived, obtained or acquired prior to the Effective Date of the Agreement or (ii) developed, conceived, obtained or acquired independently of the Agreement or not as part of the approved Project Statement.
8.1.4 “Intel Field of Use” means (i) media access controller (“MAC’) technology for Ethernet networking technologies; (ii) technology related to manufacturing, metrology, testing, inspection, architecture, functionality and/or power management of (iii) Processors, (iv) Chipsets and (v) Intel processor based motherboards; and (vi) additional technology, if any, expressly identified in an applicable Project Statement.
8.1.5 “Intellectual Property” means any and all intellectual property rights including all of the following and all rights in, arising out of, or associated therewith: (i) procedures, designs, inventions, and discoveries; (ii) works of authorship, copyrights and other rights in works of authorship; (iii) mask work rights, and (iv) know-how, show-how and trade secrets on a worldwide basis, but excluding all Patents issued or issuable thereon, and all trademarks, trade names, or other terms of corporate or product identification.
8.1.6 “Patents” means all classes or types of patents (including, without limitation, originals, divisions, continuations, continuations-in-part, extensions, renewals, reexaminations, or reissues), and applications for these classes or types of patent rights in all countries of the world (collectively, “Patent Rights”) that are owned or controlled by the applicable Party during the term of the Agreement.
8.1.7 “Patent Prosecution” means (i) preparing, filing and prosecuting patent applications (of all types), (ii) maintaining any Patents, and (iii) managing interference, reexamination or opposition proceedings relating to the foregoing.
8.1.8 “Project” means the development of [*] Product during the term of this Project Statement as part of an approved Project Statement.
8.1.9 “Project IP” means all Intellectual Property and Patents developed or conceived under this Project Statement by one Party or both Parties as part of an approved Project Statement to develop [*] Products. Project IP does not include the Background IP of either Party.
8.1.10 “[*] Product” means a product consisting of a single integrated circuit of the integration of Intel’s 10GbE dual MAC with Aquantia’s 10GbE dual PHY described in the approved Project Statement to create [*] Product on [*] process.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.2 | Intellectual Property and Patent Ownership |
8.2.1 Background IP. As between the Parties, Intel shall have exclusive ownership of Intel’s Background IP, and Aquantia shall have exclusive ownership of Aquantia’s Background IP.
8.2.2 Protect IP
8.2.2.1 Any and all Project IP, other than mask work rights, that falls within the Intel Field of Use, whether solely or jointly developed, shall be owned solely by Intel (“Intel Owned IP”). Aquantia hereby assigns to Intel all of the Project IP developed or co-developed by Aquantia pursuant to this Project Statement that falls within the Intel Field of Use.
8.2.2.2 Any and all Project IP that falls within the Aquantia Field of Use, whether solely or jointly developed, and all mask work rights that are part of the Project IP, shall be owned solely by Aquantia (“Aquantia Owned IP”). Intel hereby assigns to Aquantia all of the Project IP developed or co-developed by Intel pursuant to this Project Statement that falls within the Aquantia Field of Use.
8.2.2.3 Any Project IP that does not fall within either the Intel Field of Use or the Aquantia Field of Use that is solely conceived by employees of one Party as part of the Project without any contribution, individually or jointly, of employees of the other Party shall be owned solely by the Party whose employees conceived such Project IP.
8.2.2.4 Any Project IP that does not fall within either the Intel Field of Use or the Aquantia Field of Use that is jointly conceived by employees of both parties as part of the Project (“Joint Out-of-Field Project IP”) shall be jointly owned.
8.2.2.5 Subject to the licenses granted in this Project Statement and upon the expressed written approval of the other Party, either Party may at its sole expense file a Patent and carry out Patent Prosecution on any Joint Out-of-Field Project IP and the non-filing Party shall assign and hereby does assign to the filing Party all of its ownership interest in such Joint Out-of-Field Project IP and agrees to execute further instruments necessary for Patent Prosecution as reasonably requested by the filing Party.
8.2.2.6 In the event either Party is unable to obtain the expressed written approval of the other Party pursuant to Section 8.2.2.5 of this Project Statement, such Joint Out-of-Field Project IP shall be kept as a jointly-owned trade secret.
8.2.3 Maskworks
8.2.3.1 Sections 8.2.1 and 8.2.2 of this Project Statement notwithstanding, Aquantia shall own the mask works for the Aquantia Product and [*] Product (each referred to as “Mask Works”).
8.2.3.2 The Mask Works may include trade secrets of Intel. In addition and not in lieu of any obligation of confidentiality imposed by the Agreement with respect to Intel Confidential Information, Aquantia shall not disclose or otherwise make any part of Mask Works available, in any form, to any person other than Aquantia employees whose job performance requires such access consistent with the exercise of Aquantia’s licenses under Section 8.3.3 of this Project Statement. Aquantia agrees to instruct all such employees on these obligations with respect to use, copying, protection, and confidentiality of Mask Works.
8.2.3.3 Upon written consent by Intel, Aquantia may deliver the Mask Works to Aquantia subcontractors approved by Intel in writing for the purpose of exercising Aquantia’s rights under Section 8.3.3 of this Project Statement under an obligation of confidentiality at least as protective as that set forth in Section 12 of the Agreement. In the event of the termination of the Agreement, except for breach by Aquantia, pursuant to Aquantia exercising its rights under Section 8.3.3.2. Aquantia may deliver the Mask Works to a mask or wafer fabrication subcontractor approved by Intel in writing, provided Aquantia complies with the conditions in Section 8.5 below. Intel consents to the Mask Works being provided to [*].
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.2.3.4 Aquantia may not assign, sublicense, lease, or in any other way transfer or disclose Mask Works to any third party or reproduce or distribute any part of the Mask Works except as expressly provided in this Project Statement.
8.2.4 GDSII files
8.2.4.1 Sections 8.2.1 and Section 8.2.2 of this Project Statement notwithstanding, Aquantia and Intel shall jointly own the GDSII files for the [*] Product. Section 8.6 defines Intel’s right to use the GDSII files to exercise Intel’s make and have made rights for [*] Product.
8.2.4.2 Each Party shall protect the GDSII files to the same extent as it protects its own similar Intellectual Property. Because the GSDII files contain confidential information of both parties, each Party shall maintain the GDSII files as confidential information of the other Party subject to Section 12 of the Agreement as well as Section 8.6 below. Aquantia shall not deliver Intel GSDII files (for PCIE) to any third party company for any reason without written permission and approval from Intel. Intel shall not deliver Aquantia GDSII files for the PHY to any third party company for any reason without written permission and approval from Aquantia.
8.3 | Licensing |
8.3.1 Aquantia grant to Intel. Subject to the terms of the Agreement, Aquantia hereby grants to Intel a royalty-free, non-exclusive, nontransferable, non-sub licensable (except as expressly provided herein), irrevocable, worldwide license under Project IP and Aquantia Background IP used in the development of the [*] Product to:
8.2.2.1 use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product;
8.2.2.2 disclose (subject to Section 12 of the Agreement), use, copy, have copied, modify and have modified Intellectual Property delivered to Intel by Aquantia as part of a Project Statement solely for the purposes of design validation, bug evaluation and repair of designs using [*] Product;
8.2.2.3 use [*] Product, and to use, make, have made, sell, offer to sell and import Intel products that incorporate or are otherwise adapted to operate with [*] Product. Intel shall further have the right to extend to direct or indirect customers of Intel a license under all of Aquantia’s Patent rights in the [*] Product to use, sell, offer to sell or import Intel products that incorporate or are otherwise adapted to operate with [*] Product.
8.3.2 API License. In addition to the licenses set forth above, Aquantia further grants to Intel a royalty free, non-exclusive, irrevocable, worldwide license to copy, display, perform, create derivative works and distribute Aquantia’s API software which shall be provided in both object and source code form and which is more fully described in Attachment #2.
8.3.3 Intel grant to Aquantia. Subject to the terms of the Agreement and for the term of the Agreement, Intel hereby grants to Aquantia a royalty-free, non-exclusive, nontransferable, non-sub licensable, irrevocable (except for breach of the Agreement by Aquantia), worldwide license under Project IP and Intel Background IP used in the development of the [*] Product to:
8.3.3.1 internally use, copy and have copied the technology delivered to Aquantia by Intel as part of a Project Statement solely for the purposes of developing and supporting the [*] Product as specified in an approved Project Statement solely for the benefit of Intel;
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
8.3.3.2 make, have made (subject to Section 8.5 (Consent for Aquantia Products) the [*] Products solely for the benefit of Intel; and sell the [*] Product only to Intel; and to make and have made, use, import, offer for sale and sell the Aquantia Product subject to Intel approval provided in Section 8.5 (Consent for Aquantia Products).
8.3.4 Except as set forth in Section 8.3.3.2 in no event may Aquantia exercise the foregoing license to develop, make, use, sell or otherwise distribute any Intel Background IP or Intel Project IP other than for Intel’s benefit. Aquantia shall have no right to make or use the [*] Product for its own use, or to sell the [*] Product to anyone other than Intel.
8.3.5 The Parties acknowledge that nothing in the foregoing is intended to restrict Aquantia from testing and validating the [*] Products to the extent necessary for the purpose of fulfilling its obligations under the Agreement.
8.4 Have Made Rights. For purposes of exercising its have made rights granted under Sections of this Project Statement (Licensing), Aquantia may deliver Intel Technology delivered to Aquantia by Intel only to those subcontractors approved in advance in writing by Intel.
8.5 Consent for Aquantia Products.
8.5.1 Prior to Aquantia’s initial release of the Aquantia Product, Aquantia shall [*] in order to ensure that adequate security has been incorporated to prevent [*] within the Aquantia Product. Upon Intel’s foregoing written approval for the Aquantia Product, Aquantia may exercise its rights under the license granted in Section 8.3.3.2, unless and until Aquantia desires to [*] submit such new method [*].
8.5.2 In the event of the termination of the Agreement, Aquantia may exercise its rights under the license granted in Section 8.3.3.2, but only with respect to Aquantia Products [*].
8.5.3 In the event of the termination of the Agreement, Aquantia represents and warrants that it shall [*].
8.6 Continuity of Supply
8.6.1 Forecast and Manufacturing Cycle Time.
8.6.1.1 Intel shall provide Aquantia with a rolling [*] forecast per the Agreement (“Forecast”) and both Aquantia and Intel shall mutually agree to [*] for the Aquantia manufacturing cycle which is to be used to [*].
8.6.1.2 Aquantia’s manufacturing cycle time (“Manufacturing Cycle Time” or “MCT”) is [*].
8.6.1.3 Intel shall place non-cancellable purchase orders with lead time equal to or longer than MCT.
8.6.2 Subject to the terms of the Agreement, Aquantia grants to Intel a worldwide, nonexclusive, nontransferable, perpetual, irrevocable license to manufacture, or have manufactured, use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product as limited in this Section 8.6. Intel covenants and agrees that it shall have the option to exercise the rights granted pursuant to this Section 8.6.2 upon the occurrence of one or more of the Trigger Events set forth in Section 8.6.2.1 below.
8.6.2.1 A “Trigger Event” is any one of the following events (each, a “Trigger Event”): [*].
8.6.2.2 [*].
8.6.3 [*].
8.6.4 [*].
8.6.5 [*].
8.7 Product Markings. The [*] Product shall be marked as an Intel-branded device. Aquantia shall meet Intel’s requirements for Intel branded products as required by Intel.
8.8 End of Life. Aquantia shall support [*] design and Intel manufacturing requirements to at least [*], with annual evergreen renewal. If Aquantia needs to discontinue manufacture of [*] product, Aquantia shall provide [*] notification of discontinuance of manufacturing [*] product.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
9 | DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT |
For Aquantia: | For Intel: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8/17/12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #1 TO PROJECT STATEMENT #2: [*] PRODUCT
REQUIRED FEATURES OF THE [*] PRODUCT
Project Summary:
[*7 pages*]
There shall be full commitment from both sides to finish the testing and coverage milestones on schedule even if this entails onsite support.
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8/17/12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #2 TO [*] PRODUCT PROJECT STATEMENT
STATEMENT OF WORK (“SOW”)
This Attachment #2 describes Key Milestones, deliverables and required dates throughout the Project. All subsequent changes or additions to these milestones, deliverables and dates are subject to ratification by Intel and Aquantia in meetings held by the Program Managers at Intel and Aquantia, and recorded in the Meeting Minutes and Project Schedule.
Aquantia Deliverables and Milestones
The table below represents a summary of the Aquantia & Intel deliverables, milestones, and associated delivery dates. [*].
Section Reference |
Owner(s) | Deliverable/Milestone | Date | |||
(commit) | ||||||
1 | Aquantia | [*] | [*] | |||
2 | Aquantia | [*] | [*] | |||
3 | Intel | [*] | [*] | |||
4 | Aquantia | [*] | [*] | |||
5 | Aquantia | [*] | [*] | |||
6 | Aquantia | [*] | [*] | |||
7 | Intel | [*] | [*] | |||
8 | Intel | [*] | [*] | |||
9 | Intel | [*] | [*] | |||
10 | Aquantia | [*] | [*] | |||
11 | Intel | [*] | [*] | |||
12 | Aquantia | [*] | [*] | |||
13 | Aquantia | [*] | [*] | |||
14 | Intel | [*] | [*] | |||
15 | Aquantia | [*] | [*] | |||
16 | Aquantia | [*] | [*] | |||
17 | Aquantia | [*] | [*] | |||
18 | Aquantia | [*] | [*] | |||
19 | Intel | [*] | [*] |
[*].
Checkpoints with Aquantia
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Milestone Definition
Section Ref |
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Milestone Definition | ||
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[*1 page*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8/17/12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #3 TO [*] PRODUCT PROJECT STATEMENT
Quality and Reliability CONFORMANCE REQUIREMENTS
Sample Size May Change Per Risk Assessment
These Q&R requirements may be adjusted, upon due consideration by both Intel and Aquantia at a peer-to-peer level, or by formal re-negotiation and written acceptance, if so required.
[*].
[*] Requirements [*]
Stress | [*] Requirement [*] | Notes | ||
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[*] Q&R Requirements
Stress | Lots Total | Units/Lot | QS Requirement | PRQ Requirement | Notes | |||||
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Notes:
[*7 pages*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8/17/12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #4 TO [*] PROJECT STATEMENT
HVM Requirements and Customer returns support
[*].
Activity |
Condition to enable monitor |
Monitor flow |
Condition for elimination | |||
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[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8-18-12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #5 TO [*] PROJECT STATEMENT
Test Requirements
[*].
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AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 8/17/12 | Date: | 8/20/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #3 – [*] SINGLE PORT PRODUCT
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #3 (“Project Statement”) will be attached to and incorporated in the “Agreement” as Attachment Number #3. For purposes of this Project Statement #3, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date. The purpose of this Project Statement #3 is to set forth the terms and conditions under which Aquantia shall develop and deliver a 10GbE Single Port MAC/PHY device (“[*] Product”). The Parties agree that the date of this Project Statement #3 shall be July 26, 2012.
Any changes to the specifications of [*] Single Port Product that are set forth in this Project Statement #3 must be agreed to by the Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
Aquantia shall modify [*], and create the [*] Single Port Product on [*] process. [*] Single Port Product shall be delivered as tested devices to Intel. [*] Single Port Product is a Custom Item.
3. | PRICING |
3.1 | [*] Units Purchase Price |
Intel may purchase [*] at the pricing specified below. Intel shall place purchase orders [*] units delivered to it in keeping with the purchase order terms specified in Sections 3 and 4 of the Master Purchase Agreement and the [*] Product Project Statement #1, except as noted in this document.
Prompt payment will be computed from the latest of:
[*].
3.2 | [*]. |
3.3 | Product Markings |
The [*] Single Port Product shall be marked as an lntel-branded device. Aquantia shall meet Intel’s requirements for Intel branded products as required by Intel.
3.4 | End of Life |
Aquantia shall support [*] Single Port Product design and Intel manufacturing requirements to at least [*], with annual evergreen renewal. If Aquantia needs to discontinue manufacture of [*] Single Port Product, Aquantia shall provide [*] notification of discontinuance of manufacturing [*] Single Port Product.
4. | PROJECT MANAGEMENT |
The Parties agree to assign dedicated project managers, engineering managers, and other personnel to this project as specified below. The project managers will exercise overall project responsibility for their respective Party:
Program and Engineering Project Managers
Party | Name | Title | Phone# | |||||
Intel |
[*] | [*] | [*] | [*] | ||||
Intel |
[*] | [*] | [*] | [*] | ||||
Intel |
[*] | [*] | [*] | [*] | ||||
Intel |
[*] | [*] | [*] | [*] | ||||
Intel |
[*] | [*] | [*] | [*] | ||||
Intel |
[*] | [*] | [*] | [*] | ||||
Aquantia |
[*] | [*] | [*] | [*] | ||||
Aquantia |
[*] | [*] | [*] | [*] | ||||
Aquantia |
[*] | [*] | [*] | [*] |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
In addition, when applicable, both Parties agree to assign cross-functional team members to the [*] Product project. These members will include employees of each Party representing, but not limited to, the following functions or disciplines:
Analog Engineering (IO cells, PHY, and noise analysis)
Applications Engineering
Board Engineering
CAD Engineering (Layout, DRC)
Customer Support
Digital Engineering (ASIC and CMOS micro-architecture)
Software Engineering
Foundry Support
Manufacturing Test Engineering
Marketing
Operations
Packaging Engineering
Product Engineering
Production Operations and Document Control
Quality & Reliability Engineering
Silicon Validation
8 | DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT |
For Aquantia: | For Intel: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | July 30, 2012 | Date: | 8/1/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #1 TO PROJECT STATEMENT #3: [*] SINGLE PORT PRODUCT
REQUIRED FEATURES OF THE [*] SINGLE PORT PRODUCT
Project Summary:
[*] |
[*] | |
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[*] | |
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[*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | July 30, 2012 | Date: | 8/1/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #4 – [*]
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #4 (“Project Statement”) will be attached to and incorporated in the “Agreement” as Attachment Number #4. For purposes of this Project Statement #4, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date. The purpose of this Project Statement #4 is to set forth the terms and conditions under which Aquantia shall meet Intel [*] requirements and deliver the 10GbE Dual Port MAC/PHY device (“[*] Product”). The Parties agree that the date of this Project Statement #4 shall be November 8, 2012. [*]
Any changes to the specifications of [*] Dual Port Product that are set forth in this Project Statement #4 must be agreed to by the Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
Aquantia shall [*] and deliver the [*] Product Project Statement #1 Dual Port device, according to the following mutually agreed schedule.
In addition, Intel agrees [*].
2.1 | SCHEDULE |
PRODUCT | PRODUCTION [*] | PURCHASE ORDER PLACEMENT | ||
[*] | [*] | [*] | ||
[*] | [*] | [*] | ||
[*] | [*] | [*] | ||
[*] | [*] | [*] |
2.2 | PART NUMBERS |
MM# | Supplier Part # | Product | Top Marking | Spec# | Step | Description | Status & Media | |||||||
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
3. | DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT |
For Aquantia: | For Intel: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 11/14/2012 | Date: | 11/19/12 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
*ADDENDUM A
PROJECT STATEMENT #5 – [*]
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #5 (“Project Statement”) will be attached to and incorporated in the “Agreement” as Attachment Number #5. For purposes of this Project Statement #5, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date. The purpose of this Project Statement #5 is to set forth the terms and conditions under which Aquantia shall meet Intel [*] requirements and deliver the 10GbE Dual Port MAC/PHY device (“[*] Product”). The Parties agree that the date of this Project Statement #5 shall be December 7, 2012.
Any changes to the specifications of [*] Dual Port Product that are set forth in this Project Statement #5 must be agreed to by the Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
The purpose of this Addendum is to [*]. In order to accomplish this, the Parties agree to the following:
Intel contributions:
• | [*]. |
Aquantia contributions
• | [*]. |
• | [*]. |
2.1 SCHEDULE
Dec | Jan | Feb | Mar | Apr | May | Jun | Total | |||||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | ||||||||
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[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | ||||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] |
2.2 [*] Forecast Report 12/10/2012
Product | Media | JAN ’13 |
FEB ’13 |
MAR ’13 |
APR ’13 |
MAY ’13 |
JUN ’13 |
JUL ’13 |
AUG ’13 |
SEP ’13 |
OCT ’13 |
NOV ’13 |
DEC ’13 |
TOTAL FORECAST | ||||||||||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] |
2.3 PART NUMBERS
MM# | Supplier Part # | Product | Top Marking | Spec# | Step | Description | Status & Media | |||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | |||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] |
3. | DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT |
For Aquantia: | For Intel: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 12/17/2012 | Date: | 1/16/13 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #6 — [*]
1. | INCORPORATION INTO AGREEMENT |
Intel and Aquantia (the “Parties”) agree that this Project Statement #6 (“Project Statement”) will be attached to and incorporated into the “Agreement” as Attachment Number #6. For purposes of this Project Statement #6, the “Agreement” means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date. The Parties agree that the date of this Project Statement #6 shall be July 10, 2013.
Any changes to this agreement must be agreed to by both Parties in writing.
2. | DEFINITIONS AND PRODUCT DESCRIPTION |
2.1 | PRICE SCHEDULE AND PART NUMBERS |
The new [*] pricing schedule [*] is agreed as follows
Product | MM# | Q3 2013 |
Q4 2013 |
Q1 2014 |
Q2 2014 |
Q3 2014 |
Q4 2014 |
Q1 2015 |
Q2 2015 |
Q3 2015 |
Q4 2015 | |||||||||||
[*] |
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] |
2.2 | CONDITIONAL [*] PAYMENT STRUCTURE |
Solely with respect to [*] unit prices made during the new [*] pricing schedule listed above in section 2.1 the Parties have agreed to the conditional [*] payment structure. An [*] payment of [*] will be made by Intel to Aquantia on each [*] unit: [*] For clarity, while the intent is to ensure Aquantia receives payment within [*] of the shipment of the Intel [*] where applicable, nothing is construed to make an objectively reasonable delay in payment of the [*] payment a material breach.
This Report shall be treated as Intel Confidential information under Section 12 of the Agreement. For clarification, this does not require the disclosure of the underlying Intel sales order to the Intel Customer.
3. | FORECAST |
Intel shall, in good faith and due diligence, work to gain new customer business with [*] LOM Products based on the Price Schedule in Section 2.1 above.
Both Parties agree the forecast and new customer business are subject to change and is not a commitment. Aquantia understands that Intel customer demand is dependent on market conditions and other factors beyond Intel’s control. This may result in demand being increased, reduced, or eliminated.
4. | LEGAL EFFECT ON AGREEMENT |
All provisions of the Agreement shall remain in full force and effect. In the event of a conflict between this Amendment and the Agreement, this Amendment shall take precedence.
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
AMENDMENT #
TO
THE AGREEMENT
BETWEEN
INTEL AND AQUANTIA
THIS AMENDMENT # (“Amendment”) to the Master Purchase Agreement between INTEL CORPORATION, a Delaware corporation, which includes its Affiliates, having its principal place of business at 0000 Xxxxxxx Xxxxxxx Xxxxxxxxx, Xxxxx Xxxxx, Xxxxxxxxxx 00000, XXX (“Intel”), and AQUANTIA CORPORATION, having its principal place of business at 000 Xxxxxx Xxxxx, Xxxxxxxx, XX 00000 (“Aquantia”), referred to collectively as the “Parties” or each individually as “Party’.
RECITALS
• | Effective January 15, 2009, the Parties entered into a Technology Collaboration Agreement (“Agreement”); |
• | The Parties now wish to amend the Agreement by incorporating a new Project Statement #6, attached to this Amendment. |
IN WITNESS WHEREOF, the Parties have caused this Sixth Amendment to be executed by their respective corporate officers or agents.
FOR AQUANTIA: | FOR INTEL: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, Networking Division | |||||||
Date: | Date: |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #7 – [*] LEAD FREE QUALIFICATION
1.0 | INCORPORATION INTO AGREEMENT |
This Project [*] Lead Free Qualification is entered into by and between Intel Corporation a Delaware corporation, having its principal place of business at 0000 Xxxxxxx Xxxxxxx Xxxxxxxxx. Xxxxx Xxxxx, XX 00000, and its Affiliates (“Intel”), Aquantia Corporation, Inc., a California corporation having its principal place of business at 000 Xxxxxx Xxxxx, Xxxxxxxx, XX 00000, and its Affiliates (“Aquantia”), effective as of the date of the last signature (the “Effective Date”).
The parties agree that this Project Statement shall be attached to and incorporated in the “Agreement”, entered a certain Master Development, Purchasing and License Agreement as of January 8, 2009 (the “Agreement”). For purposes of this Project Statement, the Agreement means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to- date (“Agreement”). The parties agree to this Project Statement to the Agreement to set forth terms and conditions under which Aquantia will provide a framework for managing the activities used by both parties in order to perform the required tasks to successfully have the [*] lead Free product qualified, investigate all failures, implement appropriate corrective actions, and to pursue continuous improvements The parties agree that any work related to this Project Statement, even if commenced by the parties prior to the Effective Date, is covered by the terms of this Project Statement.
The terms and conditions of the Agreement are incorporated herein by reference. To the extent the terms and conditions of this Project Statement #1 conflict with the Agreement, this Project Statement will govern. Capitalized terms used herein, but not defined in this Project Statement will have the meanings set forth in the Agreement.
Any changes to the specifications of the [*] Product that are set forth in this Project Statement must be agreed to by the parties in writing.
2.0 | [*] SCHEDULES |
2.1 | [*]. |
3.0 | [*] PAYMENT STRUCTURE |
3.1 | Refer to the section 2.2 of Amendment #6 |
Table A
Activities | Qualification Costs | |
[*] | [*] | |
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[*] | [*] | |
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[*] | [*] |
Schedule A
Activities | Total PO Cost | |
[*] | [*] |
Schedule B
Payment Milestone | QA Payment | |
[*] | [*] | |
[*] | [*] |
4.0 | [*] SCHEDULE |
Sept-14 | Oct-14 | Nov-14 | Dec-14 | Jan-15 | Feb-15 | Mar-15 | Apr-15 | May-15 | Jun-15 | Jul-15 | Aug-15 | |||||||||||
[*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | [*] | ||||||||||||||
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[*] |
Aquantia Corporation | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: | CEO | Title: | General Manager, Networking Division | |||||
Date: | 9/26/14 | Date: | 9/25/2014 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ADDENDUM A
PROJECT STATEMENT #6 – [*] PRODUCT
1.0 | INCORPORATION INTO AGREEMENT |
This [*] Project Statement #6 (“Project Statement”) is entered into by and between Intel Corporation a Delaware corporation, having its principal place of business at 0000 Xxxxxxx Xxxxxxx Xxxxxxxxx, Xxxxx Xxxxx, XX 00000, and its Affiliates (“Intel”), Aquantia Corporation, Inc., a California corporation having its principal place of business at 000 Xxxxxx Xxxxx, Xxxxxxxx, XX 00000, and its Affiliates (“Aquantia”), hereinafter collectively referred to as (the “Parties”). The effective date of this Project Statement #6 is the date of the last signature (the “Effective Date”).
The Parties agree that this Project Statement shall be attached to and incorporated in the Agreement. For purposes of this Project Statement, the Agreement means the Master Purchase Agreement between Intel Corporation and Aquantia Corporation dated January 15, 2009, as amended to-date (“Agreement”).
Any changes to the specifications of the [*] Product that are set forth in this Project Statement shall be agreed to by the Parties in writing. If any terms in the Agreement and the other previous amendments conflict with any terms in this Project Statement, the terms in this Project Statement shall govern regarding the subject matter herein.
2.0 | PURPOSE |
The purpose of this Project Statement is to set forth the terms and conditions under which Aquantia shall qualify and label Intel-branded single, dual and quad port 10GBASE-T PHY devices based upon Aquantia’s [*] Aspen standard 10GBASE-T product line (“[*] Product”).
3.0 | DEFINITIONS AND PRODUCT DESCRIPTION |
Aquantia shall qualify and label Intel-branded single, dual and quad port 10GBASE-T PHY based upon Aquantia’s Aspen standard 10GBASE-T product line to create the [*] Product on [*] process. The product features, packaging and interface specifications shall remain unchanged relative to the current [*] Aspen standard product offering. Product packages shall include 3 SKUs. The quad port SKU are housed in a 25x25mm 576 Ball FCBGA package and the dual and single port devices will be housed in pin compatible 19x19mm 324 Ball FCBGA packages. Intel and Aquantia shall agree upon a Qualification Schedule that meets Intel’s PRQ (Production Release Qualification) specifications.
3.0 | TECHNICAL REQUIREMENTS |
3.1 | The [*] Product includes [*]. |
3.1 | Features list |
Description |
Vendor Response Quad Port |
Vendor Response Dual Port |
Vendor Response Single Port | |||
Packaging and SKUs |
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MAC Interface Options and System Support |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
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Line Side BASE-T Interface |
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3.2.1 | Power features include: [*]. |
3.2.2 | Test, manufacture, and support features include: [*]. |
4.0 | PRICING |
4.1 | Sample and/or Prototype Units. Upon availability and prior to [*] or other dates subsequently agreed to by the Parties, Intel may purchase sample or prototype units of [*] Product from Aquantia as follows: |
4.1.1 | Aquantia shall provide [*] cumulative sample and/or prototype units to Intel at [*]. Intel may purchase additional samples as follows: [*]. |
4.2 | [*] Units Purchase Price. Intel may purchase [*] at the pricing specified below following its delivery to Aquantia of Intel’s written confirmation that [*] Product has received [*]. Following such notice Intel shall place purchase orders at [*] units delivered to it in keeping with the purchase order terms specified in Sections 3 and 4 of the Agreement. |
4.3 | Prompt payment shall be computed from the latest of: [*]. |
4.4 | The [*] Schedule below is [*] and is based on [*]. |
[*] Schedule
Year | Quad | Dual | Single | |||
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[*] | [*] | [*] | |||
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[*].
5.0 | [*]. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
5.4 | Prior to the delivery of prototypes, Intel may cancel the design and engineering work under the SOW for the [*] Product by written notice to Aquantia, whereupon Aquantia shall cease work in connection with the Product. |
6.0 | DEFINITIONS |
1000BASE-CX | IEEE 802.3z Gigabit Ethernet Standard for short haul copper (up to 25m). | |
1000BASE-LX | IEEE 802.3z Gigabit Ethernet Standard using long wavelength (1300nm) laser, typically over Single mode Fiber. | |
1000BASE-SX | IEEE 802.3z Gigabit Ethernet Standard using short wavelength (850nm) laser, typically over Multi-mode Fiber. | |
1000BASE-T | IEEE 802.3ab Gigabit Ethernet Standard Physical Layer definition for long haul copper (up to 100m) over 4 pair of Category 5 balanced copper cabling. | |
10GBASE-T | IEEE 802.3an | |
802.3ab | IEEE standard that defines 1000BASE-T. | |
802.3u | IEEE standard that defines 100BASE-TX. | |
802.3z | IEEE standard that defines 1000BASE-CX, 1000BASE-LX, 1000BASE-SX. | |
AFE | Analog Front End that converts digital signals to analog for input and output on physical interface. | |
AoL | Alert-on-LAN. | |
ASF | Alerting Standards Form. | |
BRD | The library format for Cadence Allegro PCB designs | |
CTE | Cold Temperature Elimination – a method to eliminate the need of testing at cold temperature at high volume production, while still achieving quality / reliability requirements. | |
DB | The library format of Synopsys synthesis libraries. | |
DFT | Design For Testability. | |
DRC | Design Rule Check. | |
DSP | Digital Signal Processor. | |
EEPROM | Electrically Erasable Programmable Read Only Memory. | |
EEE | Energy Efficient Ethernet | |
GMAC | Gigabit MAC. | |
GMII | Gigabit Media Independent Interface. | |
GPIO | General Purpose Input/Output. This is a software controllable input/output pin/pad. | |
HDL | Hardware Description Language. | |
HSPICE | Industry standard models for package, analog, circuit simulation. | |
IAS | Integration Architecture Specification – is the overall system specification for Xxxxxx Hills-LM/LC and shall be the reference point for all functions and features. | |
IBIS | An industry standard simulation / signal characterization model of IOs. | |
IO | Input/Output. Typically refers to a silicon pin/pad. | |
LOM | LAN-on-Motherboard. | |
LVS | Layout Versus Schematic. | |
MAC Controller | The logic that provides the MAC function along with DMA and a host interface (e.g. PCI). | |
Modelsim | Model Technology’s HDL simulator product. | |
PDT | Intel and AQUANTIA Joint Program Development Team. | |
PHY | Physical Layer Device. The device/block that implements the AFE. | |
POR | Plan of Record. | |
PPS & PRQ | There are two qualification levels designed to meet Intel’s and its customers’ product introduction and production ramp needs, Pre-Production Samples (PPS) and Production Release Qualification (PRQ). PPS supports the unique and varied demands our businesses have in shipping limited quantities of customer qualification samples. At PRQ, Intel’s objective is to ship unlimited quantity of commercial products that meet the Q&R requirements and are supported by the applicable Intel warranty agreements. | |
SerDes | Serializer-Deserializer connection used in Backplane or to other Ethernet device or connection using high speed serial electrical interface, such as – 10GBase-KR, Serial Gigabit Media Independent interface (SGMII), XFI, and RXUAI. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
SKU | Stock Keeping Unit. | |
Synopsys | Synthesis tool company. | |
VCS | Synopsys’s HDL simulator product. | |
Verilog | An industry standard HDL language. | |
XAUI | High speed 10 Gigabit Attachment Unit Interface (RXAUI denotes reduced pin count) | |
XFI | 10Gb Framer Interface | |
ZOBI | Zero-Hours-Burn-In a method to eliminate the need of burn-in at high volume production while still achieving quality / reliability requirements. |
7.0 | PROJECT MANAGEMENT |
The Parties agree to assign dedicated project managers, engineering managers, and other personnel to this project as specified below. The project managers shall exercise overall project responsibility for their respective Party:
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
Program and Engineering Project Managers
Party | Name | Title | Phone # | |||||
Intel | [*] | [*] | [*] | [*] | ||||
Intel | [*] | [*] | [*] | [*] | ||||
Intel | [*] | [*] | [*] | [*] | ||||
Intel | [*] | [*] | [*] | [*] | ||||
Intel | [*] | [*] | [*] | [*] | ||||
Intel | [*] | [*] | [*] | [*] | ||||
Aquantia | [*] | [*] | [*] | [*] | ||||
Aquantia | [*] | [*] | [*] | [*] | ||||
Aquantia | [*] | [*] | [*] | [*] |
In addition, when applicable, both Parties agree to assign cross-functional team members to the [*] Product project. These members shall include employees of each Party representing, but not limited to, the following functions or disciplines:
Analog Engineering (IO cells, PHY, and noise analysis)
Applications Engineering
Board Engineering
CAD Engineering (Layout, DRC)
Customer Support
Digital Engineering (ASIC and CMOS micro-architecture)
Software Engineering
Foundry Support
Manufacturing Test Engineering
Marketing
Operations
Packaging Engineering
Product Engineering
Production Operations and Document Control
Quality & Reliability Engineering
Silicon Validation
8.0 | TERMINATION |
8.1 | [*] Product project cancellation by Intel for convenience: Any other section of the Agreement notwithstanding, Intel may terminate this Project Statement for convenience at any time by written notice to Aquantia. In such cases, the cancellation penalties in the amount of [*] Payment, shall apply. |
8.2 | [*] Product project cancellation by Aquantia for convenience: Aquantia may not terminate this Project Statement for convenience. |
9.0 | INTELLECTUAL PROPERTY AND MARKING |
9.1 | Definitions |
9.1.1 | “Aquantia Field of Use” means (i) physical layer (“PHY”) technology for Ethernet networking technologies, circuit design, modeling and process design methodologies, programs and flows that do not fall within the Intel Field of Use and are not otherwise based in any way on Intel Confidential Information, (ii) dynamic back biasing technology that does not fall within the Intel Field of Use and is not otherwise based in any way on Intel Confidential Information; and (iii) additional technology, if any, expressly identified in the Project Statement. |
9.1.2 | “Background IP” means all Intellectual Property and Patents belonging to or controlled by either Party, (i) developed, conceived, obtained or acquired prior to the Effective Date of the Agreement or (ii) developed, conceived, obtained or acquired independently of the Agreement or not as part of the approved Project Statement. |
9.1.3 | “Intel Field of Use” means [*] |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
9.1.4 | “Intellectual Property” means any and all intellectual property rights including all of the following and all rights in, arising out of, or associated therewith: (i) procedures, designs, inventions, and discoveries; (ii) works of authorship, copyrights and other rights in works of authorship; (iii) mask work rights, and (iv) know-how, show-how and trade secrets on a worldwide basis, but excluding all Patents issued or issuable thereon, and all trademarks, trade names, or other forms of corporate or product identification. |
9.1.5 | “Patents” means all classes or types of patents (including, without limitation, originals, divisions, continuations, continuations-in-part, extensions, renewals, reexaminations, or reissues), and applications for these classes or types of patent rights in all countries of the world (collectively, “Patent Rights”) that are owned or controlled by the applicable Party during the term of the Agreement. |
9.1.6 | “Patent Prosecution” means (i) preparing, filing and prosecuting patent applications (of all types), (ii) maintaining any Patents, and (iii) managing interference, reexamination or opposition proceedings relating to the foregoing. |
9.1.7 | “Project” means the development of [*] Product during the term of this Project Statement as part of an approved Project Statement. |
9.1.8 | “Project IP” means all Intellectual Property and Patents developed or conceived under this Project Statement by one Party or both Parties as part of an approved Project Statement to develop [*] Products. Project IP does not include the Background IP of either Party. |
9.2 | INTELLECTUAL PROPERTY AND PATENT OWNERSHIP |
9.2.1 | Background IP. As between the Parties, Intel shall have exclusive ownership of Intel’s Background IP, and Aquantia shall have exclusive ownership of Aquantia’s Background IP. |
9.2.2 | Any and all Project IP that falls within the Aquantia Field of Use, whether solely or jointly developed, and all mask work rights that are part of the Project IP, shall be owned solely by Aquantia (“Aquantia Owned IP”). Intel hereby assigns to Aquantia all of the Project IP developed or co-developed by Intel pursuant to this Project Statement that falls within the Aquantia Field of Use. Any and all Project IP that falls within the Intel Field of Use, whether solely or jointly developed, and all mask work rights that are part of the Project IP that falls within the Intel Field of Use shall be owned solely by Intel (“Intel Owned IP”). Aquantia hereby assigns to Intel all of the Project IP developed or co-developed by Aquantia pursuant to this Project Statement that falls within the Intel Field of Use. |
9.2.3 | Any Project IP that does not fall within either the Intel Field of Use or the Aquantia Field of Use that is solely conceived by employees of one Party as part of the Project without any contribution, individually or jointly, of employees of the other Party shall be owned solely by the Party whose employees conceived such Project IP. Any jointly-created Project IP which does not fall within the Aquantia Filed of Use or the Intel Field of Use will be owned as provided for in the following Sections. |
9.2.4 | Subject to the licenses granted in this Project Statement and upon the express written approval of the other Party, either Party may at its sole expense file a Patent and carry out Patent Prosecution on any jointly developed out-of-field Project IP and the non-filing Party shall assign and hereby does assign to the filing Party all of its ownership interest in such Joint Out-of-Field Project IP and agrees to execute further instruments necessary for Patent Prosecution as reasonably requested by the filing Party. |
9.2.5 | In the event either Party is unable to obtain the expressed written approval of the other Party, such Joint Out-of-Field Project IP shall be kept as a jointly-owned trade secret. |
9.3 | MASKWORKS |
9.3.1 | Sections 9.2.1 and 9.2.2 of this Project Statement notwithstanding, Aquantia shall own the mask works for the [*] Product (each referred to as “Mask Works”). |
9.4 | LICENSING |
9.4.1 | Aquantia grant to Intel. Subject to the terms of the Agreement, Aquantia hereby grants to Intel a royalty-free, non-exclusive, nontransferable, non-sub licensable (except as expressly provided herein), |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
irrevocable, worldwide license under Aquantia-owned Project IP and Aquantia Background IP used in the development of the [*] Product to: |
9.4.1.1 | use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product; |
9.4.1.2 | use [*] Product, and to use, make, have made, sell, offer to sell and import Intel products that incorporate or are otherwise adapted to operate with [*] Product. Intel shall further have the right to extent to direct or indirect customers of Intel a license under all of Aquantia’s Patent rights in the [*] Product to use, sell, offer to sell or import Intel products that incorporate or are otherwise adapted to operate with [*] Product. |
9.4.2 | API License. In addition to the licenses set forth above, Aquantia further grants to Intel a royalty free, non-exclusive, irrevocable, worldwide license to copy, display, perform, create derivative works and distribute Aquantia’s API software which shall be provided in both object and source code form and which is more fully described in Attachment #2. |
9.4.3 | Intel grant to Aquantia. Commencing at the time Aquantia makes the first commercial sale to Intel of the [*] Product and expiring at the time of the last commercial sale to Intel, Intel hereby grants to Aquantia a royalty-free, non-exclusive, nontransferable, non-sub licensable, revocable, worldwide license under Intel-owned Patent Rights that read on technology owned by Intel within the Intel Field of Use (and only for technology that is provided to Aquantia under this Project Statement) to make the [*] Products solely for the benefit of Intel; and sell the [*] Product only to Intel. Aquantia may only provide or transfer the [*] Product to Intel. Intel grants Aquantia no other licenses or other rights including, but not limited to, patent, copyright, trademark, trade name, service xxxx or other intellectual property licenses or rights with respect to the [*] Product, by implication, estoppel or otherwise, except for the licenses expressly granted in this section. |
9.4.4 | The Parties acknowledge that nothing in the foregoing is intended to restrict Aquantia from testing and validating the [*] Products to the extent necessary for the purpose of fulfilling its obligations under the Agreement. |
9.5 | CONTINUITY OF SUPPLY |
9.5.1 | Forecast and Manufacturing Cycle Time |
9.5.1.1 | Intel shall provide Aquantia with a rolling [*] forecast per the Agreement (“Forecast”) and both Aquantia and Intel shall mutually agree to [*] for the Aquantia manufacturing cycle which is to be used to [*]. |
9.5.1.2 | Aquantia’s manufacturing cycle time (“Manufacturing Cycle Time” or “MCT”) is [*]. PO’s to be place by 10th of each month. |
9.5.1.3 | Maximum expedite charge should not exceed [*]. |
9.5.1.4 | [*]. |
9.5.2 | Subject to the terms of the Agreement, Aquantia grants to Intel a worldwide, nonexclusive, nontransferable, perpetual, irrevocable license to manufacture, or have manufactured, use and import and directly or indirectly sell, offer to sell and otherwise dispose of [*] Product as limited in this Section 9.5. Intel covenants and agrees that it shall have the option to exercise the rights granted pursuant to this Section 9.5.2 upon the occurrence of one or more of the Trigger Events set forth in Section 9.5.2.1 below. |
9.5.2.1 | A “Trigger Event” is any one of the following events (each, a “Trigger Event”): [*]. |
9.5.2.2 | [*]. |
9.5.3 | [*]. |
9.5.4 | [*]. |
9.5.5 | [*]. |
9.6 | Product Markings. The [*] Product shall be marked as an Intel-branded device. Aquantia shall meet Intel’s requirements for Intel branded products as required by Intel. |
9.7 | End of Life. Aquantia shall support [*] design and Intel manufacturing requirements to at least [*], with annual evergreen renewal. If Aquantia needs to discontinue manufacture of [*] product, Aquantia shall provide [*] notification of discontinuance of manufacturing [*] product. |
9.8 | [*]. |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
9.8.5 | Applies to all general releases of software drivers and Intel firmware. |
DESIGNATED PROJECT MANAGERS AND TECHNICAL POINTS OF CONTACT
AQUANTIA: | INTEL: | |||||||
[*] | [*] | |||||||
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | General Manager, Networking Division | |||||||
Date: | 1/16/15 | Date: | Jan 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #1 TO PROJECT STATEMENT #6:
REQUIRED FEATURES OF THE [*] PRODUCT
The product features, packaging and interface specifications shall [*].
In addition to these datasheets contents, below we have called out some specific requirements that go beyond the current content of the respective datasheets referenced above.
Table 1: [*]
[*] | [*] | [*] | [*] | [*] | ||||||
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[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 1/16/15 | Date: | Jan. 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #2 TO [*] PRODUCT PROJECT STATEMENT #6
STATEMENT OF WORK (“SOW”)
This Attachment #2 describes Key Milestones, deliverables and required dates throughout the Project. All subsequent changes or additions to these milestones. deliverables and dates are subject to ratification by Intel and Aquantia in meetings held by the Program Managers at Intel and Aquantia, and recorded In the Meeting Minutes and Project Schedule.
Aquantia Deliverables and Milestones
The table below represents a summary of the Aquantia & Intel deliverables, milestones, and associated deliver dates. [*]. Each milestone is briefly defined in the section below the table.
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[*1 page*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 1/16/15 | Date: | Jan. 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #3 TO [*] PRODUCT PROJECT STATEMENT #6
QUALITY AND RELIABILITY CONFORMANCE REQUIREMENTS
SAMPLE SIZE MAY CHANGE PER RISK ASSESSMENT
These Q&R requirements may be adjusted, upon due consideration by both Intel and Aquantia at a peer-to-peer level, or by formal re-negotiation and written acceptance, if so required.
[*].
[*] Requirements [*]:
Stress | [*] Requirement [*] | Notes | ||
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[*] Requirements
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Stress | Lots Total | Units/Lot | QS Requirement | PRQ Requirement | Notes | |||||
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Notes:
[*6 pages*]
Receivables Deliverables
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These are Q&R requirements may be adjusted, upon due consideration by both Intel and Aquantia at a peer-to-peer level, or by format re-negotiation and written acceptance, if so required.
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 1/16/15 | Date: | Jan 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #4 TO [*] PROJECT STATEMENT #6
HVM Requirements and Customer return support
[*]
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AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 1/16/15 | Date: | Jan 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |
ATTACHMENT #5 TO [*] PROJECT STATEMENT #6
Test Requirement
[*5 pages*]
AQUANTIA | INTEL CORPORATION | |||||||
By: | /s/ Xxxxx Xxxxxx | By: | /s/ Xxxx Xxxxx | |||||
Printed Name: Xxxxx Xxxxxx | Printed Name: Xxxx Xxxxx | |||||||
Title: CEO | GM, LAN Access Division | |||||||
Date: | 1/16/15 | Date: | Jan 22, 2015 |
[*] = | CERTAIN CONFIDENTIAL INFORMATION CONTAINED IN THIS DOCUMENT, MARKED BY BRACKETS, IS FILED WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO RULE 406 OF THE SECURITIES ACT OF 1933, AS AMENDED. |