Cisco/Marvell/EZchip Business Term Agreement
Exhibit 4.9
Cisco/Marvell/EZchip Business Term Agreement
The purpose of this Business Agreement (“Agreement”) is to agree on key business terms between Cisco Systems, Inc., a California corporation, having principal offices at 000 Xxxx Xxxxxx Xxxxx, Xxx Xxxx, Xxxxxxxxxx 00000-0000 (“Cisco”), Marvell International Ltd., a Bermuda corporation, with offices at Xxxxxx Xxxxx, 00x Xxxxx Xxxxxx, Xxxxxxxx, XX 00, Marvell Semiconductor Israel Ltd., an Israeli corporation, with offices at 0 Xxxxxx Xxxxxx, Xxxxxx HaCarmel Industrial Park, Yokneam, Israel 20692 (Marvell International Ltd. And Marvell Semiconductor Israel Ltd. are collectively referred to as “Marvell”) and EZchip Technologies Ltd., an Israeli corporation, having principal offices at 0 Xxxxxxx Xxxxxx, Xxxxxxx 00000, Xxxxxx (“EZchip”) to meet Cisco’s technical and business requirements for the metro Ethernet solutions for MEMRBU and other application programs across Cisco.
The key terms are around
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1.
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Marvell and EZchip Technology Agreement
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Exclusivity
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3.
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Software quote
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4.
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Pricing
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5.
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Schedule and Milestone
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Marvell and EZchip Technology Agreement
Marvell and EZchip represent and warrant that Marvell and EZchip have entered into a Technology Development, License and Manufacturing Agreement (“Technology Agreement”) which includes support obligations by EZchip, protection of confidential information, intellectual property license from EZchip and intellectual property (IP) Escrow provisions, which Marvell represents are sufficient for Marvell to fulfill its obligations to Cisco with respect to manufacture and sale by Marvell of the network processor described in this Agreement (excluding the Schedule and Milestone Section below). Marvell acknowledges that it shall enter into appropriate support arrangements with EZchip, and will possess sufficient rights to EZchip’s intellectual property, needed by Marvell to fulfill its obligations to Cisco with respect to manufacture, sale and support of network processors described herein for the duration of time set forth in the [*] Agreement executed by Cisco and Marvell Technology Group Ltd. (an affiliate of Marvell) dated [*]. In addition, Marvell shall have the requisite EZchip IP and materials relating to such network processors placed in escrow by EZchip for release to Marvell to allow Marvell to manufacture and sell the network processors to Cisco as required under the terms of the [*]. Marvell shall license EZchip IP and combine it with Marvell IP to develop the NP3C for Cisco.
List of intellectual property licensed by Marvell from EZchip for the purposes of developing the network processor described in this Agreement:
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(i)
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Network processor technology
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(ii)
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Traffic management technology
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(iii)
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The EZchip Intellectual Property Listed on Exhibit B
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Marvell shall ensure that EZchip’s intellectual property and manufacturing information needed by Marvell to manufacture and sell to Cisco the network processor described in this Agreement are placed in escrow. Further, Marvell acknowledges that Marvell has access to EZchip’s intellectual property required for Marvell to manufacture and support the network processors described in this Agreement and provide cost reduction for such network processors during the period of time specified in the[*]. EZchip aggress to work with Marvell in good faith to meet Cisco’s requirements for cost reduction for the network processors described in this Agreement.
* This portion of the Agreement has been omitted pursuant to a Request for Confidential Treatment under Rule 24b-2 of the Securities Exchange Act of 1934. The complete Agreement, including the portions for which confidential treatment has been requested, has been filed separately with the Securities and Exchange Commission.
EZchip acknowledges that Marvell shall own the mask set for the NP3C network processor (excluding any Cisco and EZchip intellectual property incorporated herein). Marvell will be responsible for manufacturing, qualification and selling of the network processors described in this Agreement to Cisco, at Cisco’s election.
Exclusivity:
[*]
Exclusivity period:
[*]
Software:
[*]
Software Support:
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Training
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To be provided as requested and agreed upon by the parties.
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Support
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On-site dedicated EZchip microcode engineer for 3 months.
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On-site EZchip SW driver engineer for 1 month.
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On-site EZchip and Xxxxxxx XX engineer(s) for HW bring-up.
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On-going local Marvell and EZchip FAE support with EZchip Support team as back-up.
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Sample code made available by EZchip, which is well documented and includes the following applications:
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L2 switch, IPv4 & IPv6 router, VPLS.
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New metro application in progress, available in August 2006.
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Pricing:
[*]
Schedule and Milestone:
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Milestone
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Date
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Comment
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Specification Closure and Kickoff
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[*]
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uArch spec closed
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[*]
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Floor Plan Start
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[*]
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Initial netlist for floor planning, layout view of all IP (Memory SerDes, PLL)
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* This portion of the Agreement has been omitted pursuant to a Request for Confidential Treatment under Rule 24b-2 of the Securities Exchange Act of 1934. The complete Agreement, including the portions for which confidential treatment has been requested, has been filed separately with the Securities and Exchange Commission.
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Milestone
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Date | Comment |
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First Netlist
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[*]
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90% netlist, Ops stack on timing, 80% logic verification
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Final Netlist
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[*]
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100% netlist ready, 99% verification, +12% slack on timing
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ECO Round Complete
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[*]
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T/O
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[*]
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Samples at Marvell
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[*]
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Internal Samples. +1 WW to Cisco
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Open Action Items:
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Cisco/Marvell/EZchip to conclude a Software licensing agreement.
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Cisco/Marvell/EZchip need to agree on business agreement of NP4c & future generation exclusivity features.
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Cisco and Marvell to conclude a SOW for the development of NP3C.
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Cisco and Marvell to conclude an addendum to the [*] for the purchase of Cisco of NP3C.
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Limitation of Liability
NOTWITHSTANDING ANYTHING TO THE CONTRARY IN THIS AGREEMENT, EXCEPT FOR I) BREACH OF CONFIDENTIALITY OBLIGATIONS HEREUNDER OR II) BREACH OF THE EXCLUSIVITY OBLIGATIONS IN THIS AGREEMENT BY MARVELL OR EZCHIP, UNDER NO CIRCUMSTANCES WILL A PARTY, ITS EMPLOYEES, OFFICERS OR DIRECTORS, AGENTS, SUCCESSORS OR ASSIGNS BE LIABLE TO THE OTHER PARTIES UNDER ANY CONTRACT, STRICT LIABILITY, TORT (INCLUDING NEGLIGENCE) OR OTHER LEGAL OR EQUITABLE THEORY, FOR ANY SPECIAL, INDIRECT, INCIDENTAL OR CONSEQUENTIAL DAMAGES OR COSTS, INCLUDING, WITHOUT LIMITATION, LOST PROFITS, ARISING OUT OF, OR RELATING IN ANY WAY TO, THE SUBJECT MATTER OF THIS AGREEMENT, REGARDLESS OF WHETHER A PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, THIS SECTION DOES NOT LIMIT A PARTY’S LIABILITY FOR BODILY INJURY (INCLUDING DEATH), OR PHYSICAL DAMAGE TO TANGIBLE PROPERTY. EXCEPT FOR I) BREACH OF CONFIDENTIALITY OBLIGATIONS HEREUNDER; II) BREACH OF THE EXCLUSIVITY OBLIGATIONS IN THIS AGREEMENT BY MARVELL OR EZCHIP; OR III) BREACH BY MARVELL OR EZCHIP OF THE PROVISIONS OUTLINED IN THE MARVELL AND EZCHIP TECHNOLOGY AGREEMENT SECTION ABOVE, UNDER NO CIRCUMSTANCES WILL A PARTY’S LIABILITY FOR DAMAGES HEREUNDER EXCEED A [*].
Confidentiality
The parties have executed a non disclosure agreement dated Feb 2, 2006 (“NDA”). To the extent that the term stated in the NDA terminates prior to the termination of this Agreement, the parties agree that the term of the NDA shall be automatically extended to the term of this Agreement. In addition, notwithstanding any limitations in the NDA, the NDA shall apply to all Confidential Information disclosed in connection with this Agreement, and the purpose of such disclosures shall include the purposes of this Agreement. The parties agree that the contents of this Agreement are Confidential Information within the meaning of that term in the NDA, and that neither will disclose to any third party the existence, intent or terms of this Agreement or the occurrence, content or other information about any discussions, or negotiations which have occurred or will occur except in accordance with the NDA.
* This portion of the Agreement has been omitted pursuant to a Request for Confidential Treatment under Rule 24b-2 of the Securities Exchange Act of 1934. The complete Agreement, including the portions for which confidential treatment has been requested, has been filed separately with the Securities and Exchange Commission.
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General Terms
Neither party grants any right in or authorizes use of its intellectual property or other proprietary property including without limitation any patent, copyright, trademarks, or trade secrets. This Agreement is made in and shall be governed by the laws of the State of California, without regards to the conflicts of laws provisions thereof and without regard to the United Nations Convention on the International Sale of Goods. The exclusive jurisdiction and venue for any action with respect to this Agreement shall be the state and U.S. federal courts having within their jurisdiction the location of Cisco’s principal place of business, and each of the parties hereto submits itself to the exclusive jurisdiction and venue of such courts for the purpose of such action. The failure by a party to exercise any rights hereunder shall not operate as a waiver of such party’s right or any other right in the future. This Agreement and all exhibits and attachments hereto constitute the entire agreement between the parties concerning the subject matter hereof.
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CISCO SYSTEMS, INC.
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Marvell International Ltd.
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By
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/s/ Xxxxxx Xxxxxx
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By
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/s/ Xxxxx Xxxxxxxx
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Name
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Xxxxxx Xxxxxx
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Name
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Xxxxx Xxxxxxxx
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Title
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Director, Manufacturing
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Title
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General Manager
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Date
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November 15, 2006
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Date
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October 3, 2006
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EZchip Technologies Ltd.
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By
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Xxx Xxxxxxxx
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Name
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/s/ Xxx Xxxxxxxx
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Title
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CEO
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Date
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October 25, 2006
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Marvell Semiconductor Israel Ltd.
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By
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/s/ [Authorized Representative]
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Name
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Title
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Date
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October 15, 2006
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4
Exhibit A
[*]
5
Exhibit B
List of EZchip IP
NP-3c Features
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Single chip, programmable, 10-Gigabit full-duplex (20-Gigabit simplex) wire-speed network processor
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Line card, services card and pizza box applications
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Full-duplex and simplex modes of operation
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Flexible processing with programmable packet parsing, classifying, modifying and forwarding
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Ingress and egress traffic management with hierarchical scheduling
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Embedded search engines eliminating the need for external search co-processors
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On-chip OAM protocol processing offload
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[*]
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PCI-Express external host interface
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Embedded search engines
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Table entries stored in DRAM; no CAM or SRAM necessary
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Multiple routing, classification and policy lookup tables with millions of entries per table
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Flexible keys and results (associated information) programmed per table
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[*]
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Content-aware stateful classifying and processing
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Off-loading control tasks from the control CPU
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Access to all 7 layers for classify and modify
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Maintain state of millions of sessions simultaneously
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On-chip state updates and learning of millions of sessions per second
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Programming
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Large code space memory for multiple and complex applications
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[*]
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Hitless application upgrades
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Single-image programming model with no parallel programming or multi-threading
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Automatic ordering of frames
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Automatic allocation of frame to processing engines (TOPs)
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[*]
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Integrated Traffic Management
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[*]
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User-defined system configuration modes, i.e. user-defined ingress or egress functionality for each traffic manager
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[*]
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LAG shaping
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Work conserving and non-work conserving schedulers
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Frame size from 1 byte to 16KB
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Up to 1 Gbyte total frame memory
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[*]
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6
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Policing: Per-flow metering, marking and policing for millions of flows
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Enhanced IFG emulation with packet- and cell-based interfaces configurable per user
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Configurable WRED profiles
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Per flow per color WRED statistics
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Packet based accounting WRED configurable in each level
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Shaping: Single and Dual leaky bucket controlling committed/peak rate/bursts (CIR, CIB, PIR, PIB) with IFG emulation for accurate rate control
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[*]
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Scheduling: WFQ and priority scheduling at each hierarchy level
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Hardware flow control per port
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[*]
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Operations and Management Offload
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KeepAlive frame generation for precise and accurate session maintenance operations
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KeepAlive watchdog timers for fastest detection time
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Statistics and Counters
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[*]
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Per-flow statistics for programmable events, traffic metering, policing and queuing
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[*]
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Programmable threshold settings and threshold exceeded notification
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Dynamic allocation and auto association between counters and flows. Counters are automatically recycled when a flow is aged or deleted.
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[*]
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Auto implementation of token bucket per flow (srTCM or trTCM or MEF5):
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Hardware implementation of token bucket calculations and coloring (i.e. green, yellow, red)
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7
