Exhibit 10.27(a)
Amendment No. I
to
OEM License and Purchase Agreement
between
Cisco Systems, Inc.
and
Osicom Technologies, Inc.
This Amendment No. I ("Amendment") is made and entered into as of November 20,
1998 ("Effective Date"), by and between Cisco Systems, Inc., a California
corporation, having principal offices at ▇▇▇ ▇▇▇▇ ▇▇▇▇▇▇ ▇▇▇▇▇, ▇▇▇ ▇▇▇▇,
▇▇▇▇▇▇▇▇▇▇ ▇▇▇▇▇-▇▇▇▇ ("Cisco"), and Osicom Technologies, Inc, a Delaware
Corporation, having principal offices at ▇▇▇▇ ▇▇▇▇▇▇▇▇ ▇▇▇▇▇, ▇▇▇▇▇▇▇▇▇
▇▇▇▇▇▇▇▇, ▇▇ ▇▇▇▇▇ ("Seller"). Cisco and Seller are referred to collectively
herein as "Parties."
The Parties desire to amend the OEM License and Purchase Agreement ("Agreement")
between Cisco and Seller dated December 24, 1997, as set forth below:
1. Exhibit A is modified as follows:
Subparagraph 2 is deleted and replaced with the following:
"2. The purchase price, to Cisco, for the Product(s) shall be per the
prices set forth herein."
Subparagraph 3. Shall apply only to the pricing included in the subparagraph for
the 2340 Quad 10/100 product.
Subparagraph 4 is added to the exhibit and consists of the following:
"Prices applicable to additional products provided by Osicom are as stated
below:
Product Description Quantity/Quarter Unit
Number Price
------------------------------------------------------------------------------
124040-01 2404-TX PCI Quad 50-599 cards $375
Fast Ethernet Adapter 600-1,499 cards $350
1500+ cards $325
Orders will be placed on a Cisco fiscal year quarterly basis. Cisco quarters are
August-October, November-January, February-April, May-July. The applicable
quantity pricing will be for the aggregate of all orders placed, whether
received directly from Cisco or from a Designated Third Party, provided the
Third Party order is received by Osicom within 5 working days of the Cisco order
for that quarter. Each purchase order must include the shipping schedule for the
applicable quarter."
2. Exhibit B is modified to include Exhibit B- 1, dated September 25, 1998, the
product specification for the 2404-TX PCI Quad Fast Ethernet Adapter.
3. Exhibit D is deleted and replaced with the attached exhibit dated
September 25, 1998.
4. Exhibit E is deleted and replaced with the attached exhibit dated
September 25, 1998.
5. Exhibit H is modified to include Exhibit H-1, dated September 25, 1998,
the Product Testing Procedures for the 2404-TX PCI Quad Fast Ethernet
Adapter.
6. Exhibit K, paragraph 1, Manufacturing Information, is modified to include
the following additional items required to build the 2404-TX PCI Quad Fast
Ethernet Adapter:
"Detailed List of Items required to Build the Quad 2404-TX board
BOMs
124040-01 2404-TX/QUAD FE/64 BIT ERC 01
402404-01 S/A PCB CMPT/2404-TX/QUAD FE/64 BIT ERC 01
Schematics
320130-00-SCH SCHEMATICS/2404-TX ERC 01
Stencil
402404-00-STE STENCILJ2404-TX ERC 01"
Except as amended and supplemented herein, the terms and conditions of the
Agreement remain in full force and effect.
IN WITNESS WHEREOF, the parties hereto have executed this Agreement by persons
duly authorized as of the date and year first above written.
CISCO SYSTEMS, INC. OSICOM TECHNOLOGIES, INC.
By: /s/ ▇. ▇. ▇▇▇▇▇▇ By: /s/ ▇▇▇▇▇▇ ▇▇▇▇▇▇
Name: ▇. ▇. ▇▇▇▇▇▇ Name: ▇▇▇▇▇▇ ▇▇▇▇▇▇
Title: Manager OEM Solutions Title: VP, Sales
Cisco/Osicom Amend. I Page 2 of 7 Cisco Confidential Information
9/25/98
Exhibit B-1
Product Specification for 2404-TX
September 25, 1998
4 Port, 64-bit Fast Ethernet Adapter for PCI
o High Performance, 64 bit, 4 Port Fast Ethernet Adapter
o Supports both 32 AND 64 bit PCI Buses
o Supports IEEE 802.3u Auto Negotiation for 10OBase-TX and lOBase-T
o Full Support for Full Duplex or Half Duplex operation
o Short Form Factor PCI Card
o Onboard Status LEDs
o Uses Existing Category 5 Cabling
o Full Plug-and-Play Support (No Jumpers)
The 2404-TX Fast Ethernet Adapter provides the equivalent of 4 separate
10/10OBase-TX adapters on one card, occupying only one slot on the PCI bus. The
addition of a 64-bit, PCI V2.1 compliant interface makes the card an excellent
choice for use in high-end server applications, while still being compatible
with current 32-bit bus architectures. The use of a 64-bit PCI to PCI Bridge,
with buffering, increases throughput on the PCI bus to the Ethernet controllers
giving your LAN even better performance.
Full Auto-Negotiation Capabilities
The 2404-TX adapter fully supports the IEEE standards for Auto-Negotiation and
flow control. The adapter will automatically determine the highest rate of
communication between other devices on the network. This includes full duplex,
100 Mbps operation giving a rate of 200 Mbps per port.
Using Existing CAT 5 Cabling
2404-TX adapters work with your existing Ethernet cabling (CAT 5 UTP), so you
don't have to re-cable your network to get the I OX performance available with
Fast Ethernet.
System Requirements
-------------------
For 100 Mbps (Fast Ethernet)
Category 5 unshielded twisted pair (UTP) cable
For 10 Mbps
Category 3 or 5 UTP cable
l0Base-T or 100Base-TX Ethernet Hub, Switch or Concentrator
Product Specifications
----------------------
Port Configuration: 4 Ports
Media: 100 Mbps - CAT 5 UTP
10 Mbps - CAT 5 or CAT 3 UTP
Media Connectors: RJ-45 (UTP)
Size: Short form factor PCI
4.2 in X 6.875in (107mm X 175mm)
Status Indicators: Onboard LEDs indicate board status:
Link Integrity and Data Traffic Activity
Power: +5 Vdc +/- 5%,3A Max
Agency Compliance: FCC (Class B), CE, UL
Warranty: 3 Years for hardware (Parts and ▇▇▇▇▇),
▇▇ days for software
Cisco/Osicom Amend. I Page 3 of 7 Cisco Confidential Information
9/25/98
Environment: Testing Underway
Interoperability: Tested for interoperability with other major
equipment manufacturers
Standards Compatibility: All IEEE Fast Ethernet and Ethernet Standards
PCI Bus Interface: Fully compliant with PCI SIG V2.1
Bus Signaling Voltage = Universal 3.3V or 5V
Data and Address Path 64 bits
Supports Parity Generation/checking
Clock rates up to 33 MHz for peak
throughput of 264 Mbps
Master Mode = supports unlimited PCI bursts
Plug and Play PCI auto configuration
Models
2404-TX 4 ▇▇▇▇, ▇▇ bit Fast Ethernet RJ-45 UTP Connectors P/N = 124040
Cisco/Osicom Amend. 1 Page 4 of 7 Cisco Confidential Information
9/25/98
Exhibit D
Project Managers
September 25, 1998
Cisco Systems, Inc.
▇▇▇▇▇ ▇. ▇▇▇▇▇▇
OEM Program Manager
▇▇▇ ▇▇▇▇ ▇▇▇▇▇▇ ▇▇., ▇▇▇ ▇▇/▇-▇
▇▇▇ ▇▇▇▇, ▇▇ ▇▇▇▇▇
(▇▇▇) ▇▇▇-▇▇▇▇
(▇▇▇) ▇▇▇-▇▇▇▇ FAX
Cisco Systems, Inc.
▇▇▇▇ ▇▇▇▇▇▇▇
Buyer/Planner
▇▇▇ ▇▇▇▇ ▇▇▇▇▇▇ ▇▇., ▇▇ ▇▇/▇-▇
▇▇▇ ▇▇▇▇, ▇▇ ▇▇▇▇▇
(▇▇▇) ▇▇▇-▇▇▇▇
(▇▇▇) ▇▇▇-▇▇▇▇ FAX
Osicom Technologies, Inc.
▇▇▇ ▇▇▇▇▇▇▇▇▇
Project Manager
▇▇▇▇ ▇▇▇▇▇▇▇▇ ▇▇▇▇▇
▇▇▇▇▇▇▇▇▇ ▇▇▇▇▇▇▇▇, ▇▇ ▇▇▇▇▇
(▇▇▇)▇▇▇-▇▇▇▇
(▇▇▇)▇▇▇-▇▇▇▇ FAX
Cisco/Osicom Amend. I Page 5 of 7 Cisco Confidential Information
9/25/98
Exhibit E
Reschedules and Cancellations
September 25, 1998
I . Increases/Reschedules. Upon notice to Seller, Cisco may increase a purchase
order as follows:
Number of Days from Quantity Subject to Increase; New Delivery Date Original Delivery Date
----------------------------------------------------------------------
1-30 days 20% of quantity for delivery within 90 days from original scheduled delivery date
31-60 days 25% of quantity for delivery within 90 days from original scheduled delivery date
61-90 days 50% of quantity for delivery within 120 days from original scheduled delivery date
90 days or more 100%
Cisco may reschedule the delivery of all or any portion of Products ordered
under a purchase order or modify the delivery locations, provided that Seller
has received at least 15 working days advance written notice. Such reschedule
may be as follows:
Number of Calendar Days Maximum Number of Calendar Days
Prior to Scheduled Ship Date To Delay Shipment
---------------------------- -----------------
15 days 30 days
30 days 60 days
60 days 90 days
2. Work Stoppage. In the event that Cisco receives a stop work order pursuant to
any government contract, Cisco may, prior to the Delivery Date, by a written
order, suspend its purchase of products hereunder. Should Cisco request Supplier
to stop shipment of Products, Supplier's obligations to meet delivery
commitments on such "stopped" shipments shall thereafter be suspended until such
time as Cisco requests Supplier to recommence shipment of Products. Cisco and
Supplier shall work together to allow Supplier to resume production as soon as
possible.
3. Cancellation. Prior to the delivery of any item, Cisco, for its own
convenience, may notify Seller in writing of its intent to cancel the order for
Products, provided Seller is notified in writing of the cancellation at least
fifteen (15) working days prior to the scheduled ship date.
THIS EXHIBIT SETS FORTH SELLER'S ENTIRE REMEDIES WITH RESPECT TO A CANCELLATION
OF ANY PURCHASE ORDER OR TERMINATION OF THE AGREEMENT BY CISCO UNDER SECTION
14.2 OF THE AGREEMENT.
Cisco/Osicorm Amend. I Page 6 of 7 Cisco Confidential Information
9/25/98
Exhibit H-1
Product Testing Procedures
September 25, 1998
Cisco/Osicom Amend. I Page 7 of 7 Cisco Confidential Information
9/25/98
TEST PROCEDURE 2404 FAST-Ethernet - EXHIBIT H-1 Document #: ▇▇▇-▇▇▇▇-▇▇
--------------------------------------------------------------------------------
0SICOM
TEST PROCEDURE 2404 Quad FAST-Ethernet
Document #: ▇▇▇-▇▇▇▇-▇▇
11/09/98 Page 1 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret taws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.
TEST PROCEDURE 2404 FAST-Ethernet Document #: ▇▇▇-▇▇▇▇-▇▇
1 INTRODUCTION
1.1 The purpose of this procedure is to insure the functional operation of the
2404 PCI Quad FAST-Ethernet card.
1.2 This procedure must be followed explicitly, step by step. Do not attempt to
make connections, apply power, or change options, until instructed to do so.
Failure to comply with these instructions could result in personal injury or
equipment damage.
2 REFERENCE DOCUMENTS
UUT Schematic 320131-01-SCH ERC 03
Top ▇▇▇▇ of Material 402404-01 ERC 02
3 EQUIPMENT REQUIRED
1) IBM compatible PC with internal PCI bus and Monitor, Keyboard and Scanner
2) 2) Fast Ethernet RJ45 Loopback Plugs (4 per card)
4 INITIAL SETUP
4.1 Install up to four (4) 2404 boards into the PCI slot(s)on the test
fixture starting with slot 0. See figure 1.
4.2 Install the appropriate loopback plugs into each card.
5 POWER UP SEQUENCE
5.1 Apply power to the PC and Monitor.
6 TEST SEQUENCE
6.1 SROM Programming, Version: 2.0 must be performed before diagnostic
tests can be run.
At the menu prompt:
Scan the SRON2404 -p 2404 barcode on the test bed.
Scan serial number barcodes on UUT cards starting with slot 0.
**serial#Oserial#3.
Press Enter
**Osicom Networking Division requires serial number data To be
entered via a bar-code wand or pen for accuracy.
6.2 Turn off power to the PC.
6.3 Turn on the power to the PC. This will load the contents of the SROM
into the INTEL components.
6.4 Verify all green link LEDs are on. (Lights closest to the main board)
6.5 At the menu type: 7 < cr >.
11/09/98 Page 2 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret laws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.
TEST PROCEDURE 2404 FAST-Ethernet Document #: ▇▇▇-▇▇▇▇-▇▇
This will load the 2404 diagnostics test software. Verify that you
are using the correct version of software. The version number is
printed at the top of the screen at startup as well as above the
result matrix.
6.6 When prompted to type the number of 2404 cards inserted into the PCI
slots, make sure the number given is the number of CARDS in the
system, and NOT the number of ports. For example, if there are four
2404 cards in the system then press '4', and DO NOT hit the return
key after typing the number!
Note: Be sure to watch the LEDs on the 2404 ports to ensure they all
flicker during this test. The link LED lights are the closest to the
motherboard. While the activity link lights are farthest from the
motherboard.
6.7 Diagnostic sub-tests will start to execute, indicated by intermittent
progress messages.
A 'FAILED!' appearing at the end of a stream of dots, indicates a failure.
A passed test is indicated by 'PASSED'.
After the number of selected passes have been completed, the 'press any
key to continue ...' I prompt will appear.
Press any key and a test matrix is generated and displayed. A test report
is created in the file diag. out as well. This file will be overwritten on
each run of the diagnostics, so if the test information needs to be kept,
be sure to move the output file.
Note: The 'MAC' addresses at the top of the screen must be checked for
accuracy and that they all there. There should be 4 addresses per card and
the addresses must be in sequence. (if 4 cards are being tested there must
be 16 addresses)
Failures are displayed by a IF[ being displayed in the appropriate box. A
box corresponds to a single test ran on a single port. Any box that
displays a 1-1 means a particular test, was not executed for that port,
and any box that displays a IV' means the test passed on that particular
port. See figure 2 for a sample result matrix with two ports being tested
with all tests. When completed reviewing the test matrix, press any key to
back to the command prompt.
The diagnostics tests may be stopped at any time by pressing the 'Escape'
key.
6.8 Turn power off to the PC test bed.
Remove loopback plugs.
Remove tested cards from the test bed and apply a 'Tested by' label to the
cards which have passed and move cards to the next operation.
11/09/98 Page 3 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret laws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.
TEST PROCEDURE 2404 FAST-Ethernet Document #: ▇▇▇-▇▇▇▇-▇▇
Failed boards need to identified, test failure documented, and boards routed to
repair.
11/09/98 Page 4 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret laws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.
TEST PROCEDURE 2404 FAST-Ethernet Document #: ▇▇▇-▇▇▇▇-▇▇
Diagram page, Figure 1.
blank not scanned
11/09/98 Page 5 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret laws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.
TEST PROCEDURE 2404 FAST-Ethernet Document #: ▇▇▇-▇▇▇▇-▇▇
CARD #100 101 1
--------------
TEST 01 p I p I
--------------
TEST 11 p I p I
--------------
TEST 21 p I p I
--------------
TEST 31 p I p I
--------------
TEST 41 p I p I
--------------
TEST 51 p I p I
--------------
TEST 61!F!j p I
--------------
TEST 71 - I p I
--------------
TEST 81 - [ILLEGIBLE]
--------------
TEST 91 - I - I
--------------
Figure 2: Example, test matrix
11/09/98 Page 6 of 6 Revision 1.0
This document is confidential and proprietary and is the exclusive property of
OSICOM Technologies Inc. This document is unpublished and is protected by
copyright and trade secret laws. This document has been provided for review by
the recipient only. Any other reproduction of this document without express
written consent of OSICOM Technologies Inc. is strictly prohibited.