Contract
Exhibit 99.1
CONFIDENTIAL TREATMENT REQUESTED: THE PORTIONS OF THIS
AGREEMENT MARKED BY “XXXXX” HAVE BEEN OMITTED PURSUANT
TO A REQUEST FOR CONFIDENTIAL TREATMENT AND HAVE BEEN
FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE
COMMISSION
This Amended and Restated Amendment No. 3, effective as of 3 June 2005 (“Effective Date”), replaces and restates original Amendment No. 3 of 5 November 2004 to the “SF Process Development and Cost Sharing Agreement” of November 26, 2002 (hereinafter referred to as the “2-Way Agreement”), as previously amended, and is made by and between International Business Machines Corporation (“IBM”), incorporated under the laws of the State of New York, U.S.A. and having an office for the transaction of business at 0000 Xxxxx 00, Xxxxxxxx Xxxxxxxx, XX 00000, U.S.A., and Chartered Semiconductor Manufacturing Ltd. (“Chartered”), incorporated under the laws of Singapore and having an office for the transaction of business at 00 Xxxxxxxxx Xxxxxxxxxx Xxxx X, Xxxxxx 0, Xxxxxxxxx 000000. IBM and Chartered may be individually referred to herein as a “Party”, or collectively as the “Parties.”
WHEREAS, the Parties mutually desire to work together to facilitate the creation of certain design kit models for the 300mm Wafer 90nm Bulk CMOS Process Development Project under the 2-Way Agreement, as well as to establish a basis for coordinating other related activities, to expand the 90nm design enablement information to be developed, and to exchange information on an ongoing basis regarding such information; and
WHEREAS, the Parties have entered into the following agreements contemporaneously with this Amended and Restated Amendment No. 3, under which they will be working with one another to develop 65nm design enablement:
- “65nm Enablement Technology Development and Cost Sharing Agreement,” along with Samsung Electric Co. Ltd., (hereinafter “3-Way Enablement Agreement”), and
- “2-Way Enablement Agreement”.
NOW THEREFORE, in consideration of the premises and mutual covenants contained herein, as well as for other good and valuable consideration, the receipt and sufficiency of which is hereby acknowledged, the Parties agree as follows:
1. The Parties acknowledge that as of 5 November 2004, IBM has partially developed XXXXX (collectively, “Design Kit Models”) for the base 300mm Wafer 90nm Bulk CMOS process (“CMOS 9SF”), as well as the low power version (“CMOS 9SF-LP”) of such process, that the Parties are developing together pursuant to the 300mm Wafer 90nm Bulk CMOS Process Development Project.
2. The Parties agree to treat the Design Kit Models as they exist on 5 November, 2004 as Background Know-How for the 300mm Wafer 90nm Bulk CMOS Process Development Project, pursuant to Section 3.4 of the 2-Way Agreement.
3. The Parties agree that any and all future changes or enhancements to the Design Kit Models that they develop together pursuant to Attachment A – Statement of Work of this Amended and Restated Amendment No. 3 shall be considered part of the Specific Results of the 300mm Wafer 90nm Bulk CMOS Process Development Project; provided, however, that the specific staffing, objectives, and other requirements for the development of the Design Kit Models shall be as set forth in Attachment A – Statement of Work, and shall not be considered part of the staffing and other aspects of the 300mm Wafer
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90nm Bulk CMOS Process Development Project as set forth in the various Exhibits to the 2-Way Agreement.
a. The purposes of this Amended and Restated Amendment No. 3 are to (i) complete the development set forth in Attachment A hereto; (ii) work together to develop certain other 90nm design enablement as set forth in Section 2 of Attachment B – Statement of Work (hereinafter “Auxiliary 90nm Enablement”) hereto; (iii) exchange information regarding the developed Design Kit Models and Auxiliary 90nm Enablement as set forth in Section 3 of Attachment B.
b. An additional objective of this Amended and Restated Amendment No. 3 is to enable Chartered or IBM to manufacture certain products designed by the other Party’s customers utilizing all or a portion of the Design Kit Models, and/or all or a portion of the Auxiliary 90nm Enablement. 3. The Parties agree that any and all changes or extensions to their activities as set forth in Attachment A – Statement of Work or Attachment B – Statement of Work of this Amended and Restated Amendment No. 3 shall be agreed to by the Parties in writing. The Parties agree that such matters shall be discussed by the IBM and Chartered Project Leaders at the quarterly meetings of the Management Committee for the 300mm Wafer 90nm Bulk CMOS Enablement Development Project as set forth in the 3-Way Agreement.
4. For the Design Kit Models, the term of confidentiality as specified in Section 7.3 of the 2 Way Agreement shall instead run from the date of disclosure by the disclosing party to the receiving party to January 1, 2007, or for two (2) years from the date of such disclosure, whichever is longer, and the term of confidentiality for Auxiliary 90nm Enablement shall be five (5) years from the date of disclosure.
5. For the avoidance of doubt, the Parties agree that solely in the case of Design Kit Models:
a. the Design Kit Models shall be deemed aspects of Specific Results and Background Know-How that Chartered may disclose to third parties pursuant to and in furtherance of the purposes set forth in Section 7.8 of the 2-Way Agreement; provided, however, that notwithstanding anything to the contrary in Section 7.8 of the 2-Way Agreement or any other part of the Agreement, in the case of disclosure of Design Kit Models to an EDA vendor pursuant to Section 7.8 of the 2-Way Agreement, XXXXX; and
b. the provisions of Section 7.10.1 – 7.10.3 of the 2-Way Agreement, inclusive, shall not apply to the Design Kit Models; and
c. the provisions of Sections 6.1 and 6.2 shall apply as if the work to be performed pursuant to Attachment A - Statement of Work of this Amended and Restated Amendment No. 3 is a Process Development Project, and the objectives and projected schedule set forth in Attachment A - Statement of Work of this Amended and Restated Amendment No. 3 were the Strategic Technology Objectives and Development Schedule, respectively.
5.1 The Parties agree the following shall apply solely in the case of Auxiliary 90nm Enablement:
a. Notwithstanding anything to the contrary in the 2-Way Agreement, as amended, the Parties agree that the terms and conditions of the 3-Way Enablement Agreement and the 2-Way Enablement Agreement governing Specific Results and Background Know How (including, without limitation, the ownership, licensing and disclosure provisions of the 3-Way Agreement) shall apply to the equivalent information of the Auxiliary 90 nm Enablement.
b. The provisions of Section 7.10.1 – 7.10.3 of the 2-Way Agreement, inclusive, shall not apply to the Auxiliary 90nm Enablement.
6. (a) Notwithstanding anything to the contrary in Section 5 or any other provision of the 2-Way Agreement as amended, save for Section 16, Chartered shall make cost share payments to
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IBM for the joint development of such Design Kit Models pursuant to Attachment A – Statement of Work of this Amended and Restated Amendment No. 3, in the amount of XXXXX.
(b) In addition, the Parties acknowledge and agree that Chartered’s cost share payments to IBM for continuation of the joint development of such Design Kit Models, as well as development of the 90nm Auxiliary Enablement, are included in the payments set forth in the 2-Way Enablement Agreement.
7. The term of this Amended and Restated Amendment No. 3 shall commence on the Effective Date and shall end upon the earlier of the following: (a) XXXXX, (b) the termination of the 300mm 65nm Enablement Development Project under the 3-Way Agreement, or (c) termination of the 2-Way Enablement Agreement.
The remainder of the 2-Way Agreement, as amended, shall remain unchanged.
IN WITNESS WHEREOF, the Parties hereto have caused this Amended and Restated Amendment No. 3 to be executed by their duly authorized representatives as of the Effective Date.
International Business Machines Corporation | ||||||
By:
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/s/ Chia Song Hwee
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By:
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/s/ XX Xxxxxxx | |||
Name: Chia Song Hwee
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Name: XX Xxxxxxx | |||||
Title: President and CEO
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Title: Vice President, Finance, IBM Systems & Technology Group | |||||
Date: 3 June 2005
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Date: 4 June 2005 |
Enc:
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Attachment A, Statement of Work – XXXXX | |
Attachment B, Statement of Work – Exchange of Improvements |
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Attachment A
Statement of Work – XXXXX
Under this SOW, the Parties will work together to develop software models for mutually agreed-to foundry macros, cores, and other circuit blocks targeted for use by customers to augment their designs for manufacture in CMOS 9SF and CMOS 9SF-LP, for the following tools according to the following projected schedule:
XXXXX
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Attachment B
Statement of Work – Exchange of Improvements
Under this SOW, for the term of this Amended and Restated Amendment 3 as set forth in Section 8 above, the Parties will work together to exchange information regarding Design Kit Models and Auxiliary 90nm Enablement, pursuant to the methodology for addressing enablement issues set forth below:
1. | Design Kit Models (90nm) |
§ | DRC Runsets (Hercules and Calibre) | |||
§ | Post cheese and fill DRC Runset as available (Hercules and/or Calibre) – to be developed pursuant to a schedule as agreed by the Technical Coordinators | |||
§ | LVS Runsets (Hercules and Calibre) | |||
§ | PEX Runsets (Star RCXT and Calibre XRC) |
2. | Auxiliary 90nm Enablement |
§ | PEX Input Files | |||
§ | Regression Tests & Validation software for DRC | |||
§ | Regression Tests for Post Cheese and Fill DRC ) – to be developed pursuant to a schedule as agreed by the Technical Coordinators | |||
§ | Regression Tests & Validation software for LVS | |||
§ | Regression Tests & Validation software for PEX | |||
§ | ESD Documentation Kit (GDS2 and documentation) | |||
§ | eFuse Documentation Kit (GDS2 and documentation) | |||
§ | Chip Kit (GDS2 for Guard ring & Alphanumerics) | |||
§ | Dual-Port SRAM cells and associated cells: GDS2 Layouts and models | |||
§ | Single-Port normal and dense SRAM cells and associated cells: GDS2 Layouts and models (as defined in the SF Process Development and Cost Sharing Agreement) | |||
§ | Cadence Tech Files | |||
§ | Technology Design Manuals |
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§ | Model Reference Guides | |||
§ | Spice models (Hspice and Spectre) |
3. | Method of Addressing Enablement Issues |
(A): Method of Addressing Technical Issues:
An “Issue Tracking” database and a “Notes Teamroom” method of submission will be established to track all technical issues submitted by JDE parties. The JDE Party Coordinator is responsible to establish and maintain such a database and provide JDE parties access to the JDE Teamroom. If an issue is submitted by a party, the Party Coordinator is responsible to promptly notify the appropriate Discipline Manager of the submission. The Discipline Manager is then responsible for addressing any technical issue the JDE parties have relating to the deliverables, clarifying/ recognizing the issue, setting the priority, and sizing the effort to fix it. If the issue involves technology redefinition or a change in content, the issue will be referred to the 65nm Design Manual Review Board (DMRB) for resolution. Note: the DMRB has representatives from all JDA companies.
Deliverable
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Discipline Manager | ||
DRC Runsets & Regressions
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DRC Manager | ||
LVS Runsets & Regressions
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LVS Manager | ||
PEX Runsets & Regressions
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PEX Manager | ||
E-FuseKit
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E-Fuse Manager | ||
Chip Kit & Cadence Tech Files
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Library Manager | ||
Memory Cells
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SRAM Manager | ||
Device Models & Model Reference Guide
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Base & LP Model Managers | ||
Technology Design Manual
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Design Manual Manager |
If the Discipline Manager is unable to resolve the conflict, the IBM Project Leader is responsible to gather with other Co-Project Leaders to resolve. The IBM Project Leader will report quarterly on issue status.
It is also the responsibility of the IBM Project Leader to coordinate with the Partner Co-Leaders, and define a priority scheme that the development team should follow when an issue is raised by a partner.
(For clarity, an example: if a DRC issue is raised by a party, it should be assigned a priority level by the party, the necessary information should be supplied to the development team for a detailed understanding, and within a specified time, an acceptance or rejection, with explanation, should be reached by the development team. If accepted, an agreed to priority is then assigned. According to the priority level, the issue should be appropriately scheduled for resolution. Each priority should have a certain development expectation associated with it and that expectation should be defined by the IBM Project Leader with agreement from all of the Co-Leaders.)
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(B): Special Technical Case: DRC Interpretation Issue:
During DRC development, any conflicts in design rule interpretation will be handled thru the development process defined in the diagram below. Once the Runset is released for distribution to customers and parties, any further interpretation issues will be resolved by the DRC Manager in a similar manner, involving the appropriate personnel to accurately resolve the interpretation issue in a timely manner and, if needed, determine a priority and schedule for Runset correction.
C: Addressing Schedule Issues:
It is the responsibility of the IBM Project Leader to clearly state forward looking schedules to the MCM and resolve any schedule/resource conflicts in achieving those stated goals. If, for some reason, a re-adjustment of schedule is warranted, the IBM Project Leader will meet with JDE Co-Leaders to resolve or achieve an acceptable alternate schedule.
D: Resources. The total employee resource to be provided by the parties for the foregoing activities shall be included in such resources as are set forth in the 3-Way Enablement Agreement and the 2-Way Enablement Agreement.
Neither Party will be responsible for model fixes or any other support regarding the results of this SOW to the other Party at any time after the activities under this SOW are completed, and in no
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event shall either Party have any support obligations of any kind to the other Party’s customers. Chartered is responsible to establish a Lotus Notes Team Room to enable IBM and Chartered developers in sharing knowledge relating to the above activity. IBM is responsible to maintain the ICC file sharing tool and allow appropriate Chartered engineers access to that system. On a quarterly basis while conducting the development set forth in this SOW, Chartered and IBM will jointly review model updates and synchronize models appropriately.
Chartered will be responsible for obtaining EDA tool licenses for the DRC, LVS, and extraction tools, as well as any other third party tools as it may choose to utilize with or in conjunction with the Design Kit Models.
This SOW does not include any licenses from either Party as to any EDA tools or other software other than the tools set forth above.
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