AGREEMENT FOR WAFER PRODUCTION AND TESTING between Advanced Power Technology, Inc. and Episil Technologies, Inc. [ * ] = Confidential treatment requested.

EXHIBIT 10.19

AGREEMENT FOR WAFER PRODUCTION AND TESTING
between

Advanced Power Technology, Inc.

and

Episil Technologies, Inc.

[ * ] = Confidential treatment requested.

             This Agreement (“Agreement”) is entered into by Advanced Power Technology, Inc.; a Delaware Corporation with headquarters located at 000 XX Xxxxxxxx Xxxxxx xx Xxxx, Xxxxxx, XXX (hereinafter referred to as “APT”)

and

Episil Technologies, Inc., a Taiwan Corporation with headquarters located at Xx 0 Xxxxxxxx  Xxxx II, Science Based Industrial Park in Hsin-Chu, Taiwan (hereinafter referred to as “EPISIL”).

RECITALS

             WHEREAS APT owns certain intellectual property rights to the technology and design methods used in the design and manufacture of APT’s Power MOS semiconductors.

             WHEREAS APT desires EPISIL to produce and supply die to APT in the form of fully processed wafers (including wafer thinning, backside implant and backside metalization).

             WHEREAS EPISIL desires to produce and supply fully processed wafers to APT upon the terms and conditions contained in this Agreement.

             WHEREAS both parties seek to enter into a long-term business relationship where EPISIL produces wafers / dies conforming to APT’s present and future technologies. These technologies include but are not limited to [*].

             WHEREAS APT understands and EPISIL agrees that production ramp-up will commence in EPISIL’s facility located in Hsin-Chu, Taiwan and that the initial wafer diameter will be [*]

             WHEREAS Episil agrees to install [*]

             WHEREAS APT understands and EPISIL agrees that production capacity will be made available to APT through either capacity expansions at EPISIL’s facility in Hsin-Chu, Taiwan or through manufacturing capability established by EPISIL in other locations including the possibility of the location being in China.

             WHEREAS both parties agree to cooperate in order to continuously improve the outgoing quality of wafers manufactured pursuant to this Agreement.

             NOW THEREFORE, based on mutual promises contained herein and intending to be legally bound, EPISIL and APT agree as follows:

1.	DEFINITIONS
1.1	“Power MOS-Die” shall mean part numbers listed and specified in Exhibit 1, to be manufactured by EPISIL for APT.  Exhibit 1 may be amended or modified in numbers and types from time to time by agreement between APT and EPISIL.
1.2	“Product Information Package” shall mean the technical information (e.g. database tape, test program, etc.) and hardware utilities specified in Exhibit 2 to be provided to EPISIL by APT for each Power MOS Die.
1.3	“Process” shall mean a manufacturing process which has been mutually accepted by APT and EPISIL and which has been specified in Exhibit 3, to be used by EPISIL for the purpose of manufacturing Wafers exclusively for APT.
1.4	“Wafers” shall mean silicon wafers with Power MOS Die manufactured by EPISIL using the Processes and design and database of the Product Information Package.
1.5	“Good Die” shall mean a Die on a Wafer which meets the specifications as per Exhibits 3 and 4, and which fully satisfies the relevant test program for Wafer test, supplied by APT.
1.6	“Proprietary Information” shall mean any and all information including but not limited to technical information, database tapes, specifications, test tapes and supporting documentation provided either orally, in writing, or in machine readable format and reticles or masks generated by or for EPISIL using the Product Information Package; provided that all such information is marked “Confidential” or similarly, or, if oral, identified as proprietary at time of disclosure and reduced to writing within thirty (30) days thereafter.  Additionally, the parties agree that this Agreement and its Exhibits as such and the content thereof shall be kept confidential except as required to comply with U.S. Securities and Exchange Commission rules and regulations and applicable stock exchange rules.  Notwithstanding the foregoing Proprietary Information does not include information generally available to the public, information independently developed or known by the receiving party without reference to information disclosed hereunder, information rightfully received from a third party without breach of confidentiality obligations, or information authorized in writing for release by the disclosing party hereunder.
1.7	“Risk Start” shall mean production of Wafers before qualification, defined in Section 2.3, has been completed.
2.	PROCESS TECHNOLOGY, MASKS, QUALIFICATION, WAFER TEST
2.1	PROCESS TECHNOLOGY
		2.1.1     APT shall provide EPISIL with the design information for each Process as described in Exhibit 2 for the purpose of specifying the Process in accordance with Section 2.1.2.
		2.1.2     Both parties agree that technology transfer and qualification will proceed first on APT’s [*] products / process with the intent that Processes are qualified for each technology listed in Exhibit 5 within [*] months of the date this Agreement is executed.
		APT and EPISIL shall agree upon Process specifications to be described in Exhibit 3, which shall be finalized before EPISIL begins production in accordance with Section 3.
		Subject to the stipulations and procedures set forth in this Agreement and in accordance with the qualification plan described in Exhibit 4, EPISIL shall install the Processes meeting the specifications in Exhibit 3 and deliver Wafers for qualification purposes.
2.2	MASKS
		2.2.1     [*]
		2.2.2     EPISIL will provide APT with sufficient information such that APT can incorporate EPISIL’s alignment structures into the mask database.  EPISIL may also choose to add the alignment marks or have them added by a third party [*]
		2.2.3     APT will supply mask databases to EPISIL or EPISIL’s designated mask vendor.
		2.2.4     EPISIL will pay for subsequent masks worn out or broken during the normal course of production.  EPISIL will also pay for any masks redesigned upon EPISIL’s request.
2.3	QUALIFICATION
		2.3.1     The qualification approval by APT for each Process and each individual Power MOS Die, manufactured with the Process, is a prerequisite for ordering and delivery of Wafers and/or Good Dies.  This Section 2.3.1 is not applicable in the case of Risk Starts.
		2.3.2     APT will pay [*] for qualification wafers, which is defined in Exhibit 5.
		2.3.3     A wafer lot will be considered as “qualification worthy” only if it has a probe yield of at least [*] of the yield obtained by APT’s own wafer fab during the prior quarter.  APT may choose to waive this requirement at its own discretion.
		2.3.4     For the purpose of qualification as specified in Exhibit 4, EPISIL shall provide APT, with the agreed upon number of Wafers.  Such Wafers delivered for qualification must also meet all agreed APT standards, specifications and requirements defined in the Exhibits 1, 2, 3 and 4 provided, however, that if failures occur due to reasons for which APT is responsible, EPISIL shall be paid 100% of the Wafer price as specified in Exhibit 5.  EPISIL shall, in accordance with the agreed schedule, deliver to APT any documents and reports as required.
		2.3.5     Prior to completion of the qualification, APT may request that EPISIL provides Wafers out of “Risk Starts”.  EPISIL will provide these Wafers out of Risk Starts to APT at the price/volume specified in Exhibit 5.
		2.3.6     During qualification, APT may stop production of Wafers for any or all APT Power MOS Die by giving written notice to EPISIL.  EPISIL will stop production following completion of the process step at which the Wafer resides at the time of such written notification.  APT will pay EPISIL for all Wafers started prior to EPISIL receiving such notice.  Prices for such Wafers will be based on the stage of production of the Wafers as defined in Exhibit 5.
		2.3.7     After APT qualification approval of a Process, EPISIL shall not carry out any major changes as defined by EPISIL’s internal standards unless approved by APT.  EPISIL may only carry out process changes upon written authorization from APT.
		2.3.8     In the case that EPISIL desires to perform major changes to a Process, APT shall be informed in writing 9 months, or a shorter period if mutually agreed upon, prior to the planned commencement of such changes to the Process and shall receive a detailed description of the planned changes in writing as well as the results of any re-qualification of the Process with the intended changes to be performed by EPISIL in accordance with Exhibits 2, 3 and 4.  APT will inform EPISIL in writing whether or not desired changes of the Process are acceptable.  In such case, a re-qualification of the Process, according to this Section 2.3, is necessary and EPISIL shall provide APT with the necessary Wafers for such re-qualification free of charge.  APT shall purchase the Wafers for re-qualification, if APT requests such changes to the Process.  Successful re-qualification is the prerequisite for final approval of APT to a major change to a Process.  APT shall not unreasonably deny its consent to a major change to a process requested by EPISIL and APT shall not withhold such consent absent clear proof that such change will have a material adverse effect on the resulting Power MOS Die (e.g., but not limited to yield, quality, reliability, specification of the respective Power MOS Die, or reasonable customer requests affecting a material quantity of Wafers).
		2.3.9     The specifications and requirements specified in Exhibits 2, 3 and 4 may only be modified by mutual written agreement between EPISIL and APT.
		2.3.10     If APT determines that modifications to the specifications are required, including modifications to photo masks, Process or testing, or next generation MOS technology, EPISIL shall perform such modifications at APT’s cost, which shall be reasonable.  Regarding modification of the Process, the parties have to agree to such proposed modifications in advance.  The parties will negotiate adjustment to production price and delivery schedule in advance if price or delivery schedule are affected by such modifications.
2.4	WAFER TESTING
		2.4.1     The testing of Wafers will be performed by EPISIL.  For the purpose of yield improvement and for the calculation of pricing, EPISIL and APT will share all information related to wafer probe results.
3.	PRODUCTION, FORECAST/ORDERING
3.1	The business for each technology will be conducted [*].
3.2	Upon written notice from APT of successful completion of the qualification as described in Section 2, and having received a purchase order from APT, EPISIL shall manufacture and deliver Wafers according to the terms of this Agreement.
3.3	EPISIL will make a reasonable best effort to allocate capacity as required by APT during the contract period.  The start date for the contract will be the qualification date for the first production part for APT.  EPISIL agrees to provide a [*] confirmation of capacity which will be reserved for APT at the agreed upon terms of pricing and cycle time. Increases in capacity required by APT will be pre-negotiated with Episil by APT, and EPISIL agrees to give its reasonable best effort to install the additional capacity in EPISIL’s facilities.
3.4	APT agrees to provide a three-month rolling forecast of the gross number of wafer starts on a monthly basis.  This gross number is not required to be device specific. [*]
3.5	The purchase of Wafers and/or Good Die pursuant to this Agreement shall be accomplished by means of purchase orders, which will be issued to EPISIL on at least an annual basis and no more frequently than on a quarterly basis.  The new purchase will be based upon the APT forecast as well as past performance against the prior period’s purchase orders.
[Note – Sections 3.6 and 3.7 intentionally not used]
3.8	APT will release to EPISIL device specific wafer starts by [*]
3.9	EPISIL agrees to provide starting material (epi wafers) pursuant to the forecasts received by APT.
3.10	It is anticipated that from time to time there will be instances where an accelerated cycle time is required to serve APT’s needs.  EPISIL will apply their best effort to meet such accelerated delivery schedules.
3.11	Both parties will immediately advise one another in writing whenever they have reason to believe that wafers may not conform to the applicable specifications.
3.12	In the case of technical problems arising in the processing of wafers, especially with regard to yield, quality, reliability, EPISIL shall notify APT in writing and APT will be prepared to assist EPISIL to a reasonable extent in solving the problem.
3.13	In case any technical problem, defect or malfunction should occur, which EPISIL will be informed about, EPISIL will immediately start investigations and supply a first substantiated answer or status report within seven (7) working days after receipt of APT’s notification of such matter.
3.13	In order to ensure traceability, processing and delivery of wafers and/or good die will be on a lot-by-lot basis unless otherwise agreed upon.  Should lot splitting be necessary, APT will be notified and given the opportunity to decide whether to recombine the sublots prior to delivery or not.
3.14	APT may request EPISIL to stop production at any time by giving written notice to EPISIL.  EPISIL will stop production following completion of the process step at which the wafers reside at the time of the notification from APT.  If the reason for such a stop of production is not attributable to a failure of EPISIL to fulfill its obligations under this Agreement, EPISIL will be paid for the wafers.  If such a stop of production is attributable to EPISIL failing to fulfill its obligations under this Agreement, only those Wafers that meet the criteria applicable to Production Wafers shall be paid for.
3.15	If any circumstances should arise that could result in a delayed delivery to APT, EPISIL shall promptly notify APT and EPISIL will make every reasonable effort to recover the original schedule.
4.	PRICES, PAYMENT, DELIVERIES AND SHIPMENTS
4.1.	Pricing for Wafers and/or Good Die are specified in Exhibit 5.  Prices are quoted in US currency.
4.2.	Payment shall be due 30 days net after receipt by APT or one of its subsidiaries and the respective invoice from EPISIL.
4.3.	Payment of invoices will be split at Episil’s discretion and direction between more than one bank account. For example, a portion of the payment for an invoice may be paid to Episil’s Foundry agent in the US and the remaining portion to Episil.
4.4.	Subject to a respective purchase order of APT or one of its subsidiaries, Wafers and/or Good Die shall be delivered in accordance with the delivery specification to the address specified by APT.  APT may, without being obligated to, perform an incoming inspection.
5.	ON-SITE INSPECTION, DOCUMENTATION AND REPORTING
5.1	Subject to EPISIL’s standard safety and manufacturing procedures, employees of APT shall be allowed to visit EPISIL’s factory during normal working hours with reasonable prior written notice to EPISIL.  Such employees shall be granted access to EPISIL’s production flow and production control information regarding products being manufactured for APT.
5.2	Subject to mutually agreeable confidentiality protections and to EPISIL’s standard safety and manufacturing procedures, and upon APT’s written request reasonable in advance, EPISIL will allow APT representatives and/or APT customers to perform an audit of EPISIL’s production site and quality systems for Wafers.  Such audits shall not occur more than four (4) times per year and no more than two (2) times per quarter unless any such audit discovers material deficiency, in which case additional audits may be conducted by APT as often as reasonably requested by APT, until such deficiencies are corrected.
5.3	On written request, EPISIL shall provide reports to APT.  These reports may include work in process, ordered volumes and outgoing volumes, probe yield, probe rejects and parametric data.  The detailed procedure shall be fixed in writing separately.
5.4	Both parties shall maintain a clear organizational responsibility for execution of this Agreement with respect to technical, logistical as well as quality issues.  At least one person from each party will be nominated to cover the administration of this Agreement full time.
5.5	Each party agrees to pay all expenses associated with communication, travel, and accommodations while visiting or communicating with the other party.
6.	WARRANTY
6.1	EPISIL warrants that all Wafers and/or Good Die delivered hereunder will meet the applicable specifications and requirements in Exhibits 1, 2, 3 and 4 and shall be free from defects in material and workmanship.
6.2	[*]
6.3	[*]
6.4	If Wafers and/or Good Die fail to meet specifications in Exhibits 1, 2, 3 and 4, and in APT’s reasonable opinion such failure appears material, APT or one of its subsidiaries may request EPISIL to stop production.  If EPISIL is unable to correct such failures within 30 days, APT or the Subsidiary that has ordered may cancel such particular orders.
6.5	If defects or malfunctions appear to be of excessive or epidemic nature resulting from processing or the use of unsuitable materials by EPISIL, then EPISIL shall take appropriate actions to remedy such defects in agreement with APT and in accordance with industry standards applicable to the individual circumstances.  EPISIL shall inform APT in writing about its actions to be taken within two (2) weeks after notification. If APT finds these actions unacceptable then they can terminate the Agreement per Section 12.
6.6	The foregoing warranty constitutes EPISIL’s exclusive liability, and the exclusive remedy of APT, for any breach of any warranty or any nonconformity of the Wafers to the specifications.  This warranty is exclusive and in lieu of all other warranties, express, implied or statutory, including but not limited to the warranties for merchantability and fitness for a particular purpose, which are hereby expressly disclaimed.
7.	FORCE MAJEURE, LATE DELIVERIES
7.1	Neither party shall be liable to the other for failure or delay in the performance of any of its obligations under this Agreement for the time and to the extent such failure or delay is caused by Force Majeure such as, but not limited to, riots, civil commotions, wars, hostilities between nations, governmental laws, orders or regulations, actions by the government or any agency thereof, storms, fires, strikes, lockouts, sabotages or any other contingencies beyond the reasonable control of the respective party and of its subcontractors.  In such events, the affected party shall immediately inform the other party of such circumstances, together with documents of proof, and the performance of obligations hereunder shall be suspended during, but not longer than, the period of existence of such cause and the period reasonably required to perform the obligations in such cases.
7.2	In addition to any other rights, in case of a delay of delivery by one month caused by whatever reason including late deliveries of EPISIL’s vendors, APT shall be entitled to cancel the order delayed, in whole or in part, without incurring any liability, and may reorder the quantities according to then existing needs of APT.  APT will have no right to cancel purchase orders if the late delivery is due to a Force Majeure of less than two months or APT’s fault.
8.	PROPRIETARY INFORMATION
8.1	Both EPISIL and APT agree that Proprietary Information of the other will be used by them exclusively for the purpose of manufacturing Wafers and/or Good Dies hereunder and will not be disclosed to any third party without the prior written permission of the disclosing party.
8.2	EPISIL agrees to use reasonable care to maintain in confidence Proprietary Information of APT furnished hereunder, not to make use thereof other than for the purposes set forth in this Agreement, and not to distribute, disclose or disseminate Proprietary Information of APT in any way or form to anyone except its own employees who have a reasonable need to know the same provided, however, that this Agreement shall impose no obligation on EPISIL with respect to any Proprietary Information which:
		a)     is already in the public domain or becomes available to the public through no breach by EPISIL;
		b)     was rightfully in EPISIL’s possession without obligation of confidence prior to receipt from APT;
		c)     was received by EPISIL from a third party without obligation of confidence;
		d)     is independently developed by EPISIL without reference to information disclosed hereunder
		e)     is approved for release by written Agreement of APT.
	Each party acknowledges and agrees that in the course of performing under this Agreement, it shall have access to and become acquainted with information concerning various trade secrets and other confidential and Proprietary Information of the other party.  This includes, but is not limited to, marketing plans, the identities of suppliers and customers, ideas, design rules, secret inventions, unique processes, compilations of information, records, specifications and other information which is owned by the other party, and shall maintain such information in confidence and shall not apply this information either directly or indirectly without prior consent from the other party to any products not included in this Agreement.
8.3	EPISIL shall destroy all defective Wafers, Die and masks unless otherwise requested by APT in writing.  In the case of idle masks, excessive Wafers and/or Good Die, EPISIL will inform APT in writing and APT will give the disposition instructions in writing within thirty (30) days.
8.4	No press release or any publication of the existence of this Agreement shall be allowed unless first approved by the other party in writing, with such approval not being unreasonably withheld.
8.5	Upon written request by APT, EPISIL shall return or destroy all written Proprietary Information received, as well as all copies made of such Proprietary Information.
8.6	All Proprietary Information of APT shall remain the property of APT.  Any masks generated by EPISIL from APT database tapes shall be the property of APT, will be returned to APT or destroyed on APT’s written request, and will be used exclusively to produce Wafers and Good Die for APT.  Nothing contained in this Agreement shall be construed as granting any license or rights under any proprietary right whether present or future.  The disclosure of Proprietary Information shall not result in any obligation to grant EPISIL rights therein.
8.7	If APT is furnished hereunder with Proprietary Information of EPISIL, the stipulation of this Section 8 shall apply accordingly in the reverse relation between the parties.
8.8	Upon termination or expiration of this Agreement for whatever reason, the receiving party shall (i) return to the other party or destroy the original and all copies of any Proprietary Information and (ii) at the disclosing party’s request, have one of its officers certify in writing that it will not make any further use of such Proprietary Information and will not manufacture or have manufactured any product incorporating Proprietary Information.
9.	PATENT INDEMNITY, PRODUCT LIABILITY INDEMNITY
9.1	It is APT’s responsibility to defend or otherwise resolve at APT’s sole expense any dispute arising from a claim that the Power MOS Die infringe a third party’s patent, trademark, copyright, mask work rights, trade secret or other intellectual properties.
9.2	Notwithstanding Section 9.1 above, it is EPISIL’s responsibility to defend or otherwise resolve at EPISIL’s sole expense any dispute arising from a claim that the Wafers or Die infringe a third party’s patent, trademark, copyright, mask work rights, trade secret or other intellectual properties due solely to the Process used by EPISIL or its subcontractors to process the Wafers.
9.3	If a third party’s claim is made alleging an infringement of a patent, copyright or other intellectual properties of the said third party, then the party to this Agreement against which this claim is raised shall immediately inform the other party thereof in writing.
9.4	APT shall indemnify and hold EPISIL harmless against any third party claims, costs and expenses due to all liabilities that may arise from EPISIL’s use of know-how supplied by APT.
9.5	EPISIL shall indemnify and hold APT, its subsidiaries and its customers harmless against any third party claims, costs and expenses due to all liabilities that may arise due to reasons other than APT’s product liability as per Section 9.4 above.
9.6	The above liabilities of a party hereto to the other party are in any case under the condition that the other party notifies the first party of the respective third party’s claim without any reasonable delay and does not admit on its own initiative that said claim was rightfully raised.
9.7	The above liability shall be the sole and exclusive remedies between the parties with respect to patent indemnity and product liability.
10.	EXPORT REGULATIONS
10.1	APT’s Product Information Package, as well as supplies furnished under this Agreement, is subject to governmental export regulations.  Consequently, these obligations may be subject to the approval by the respective governmental authorities.
10.2	For presentation to the International Export Control Authorities, EPISIL declares that all APT Product Information Packages received by EPISIL from APT are intended for manufacturing of Wafers and Good Die exclusively for APT.  EPISIL declares not to export such APT Product Information Packages to third countries without approval of the competent U.S. Export Control Authorities.
11.	ASSIGNMENT
11.1	Neither party shall delegate any obligations under this Agreement, or assign this Agreement or any interest or rights hereunder without the prior written consent of the other, except incident to the Sale or transfer of substantially all of such party’s business.
11.2	APT’s obligations under this Agreement may be performed by its subsidiaries at APT’s discretion.
12.	TERMS AND TERMINATION
12.1	This Agreement becomes effective with the execution hereof by both parties and shall remain in effect until terminated pursuant to the provisions of this Section 12.  During the duration of this agreement each party may terminate the Agreement with twenty-four (24) months prior written notice unless mutually agreed to reduce this notice time.
12.2	This Agreement may be terminated immediately by one party if the other party
		(i)     breaches any material provision of this Agreement and does not remedy such breach within thirty (30) days of notice of breach; or
		(ii)     becomes insolvent or otherwise subject to insolvency procedures;
		(iii)     comes under outside control, i.e. 50% or more of the shareholders’ voting rights are held directly or indirectly by a third party or third parties that are direct competitors of the other party.
12.3	APT may terminate this Agreement if the Power MOS Die do not pass APT’s qualification criteria set forth in Exhibit 4 and provided APT has made a reasonable attempt to execute the qualification within 6 months after receipt of qualification wafers.
	[Note – Section 12.4 intentionally not used]
12.5	The provisions of Section 6, 8, 13 and 14 shall also apply after termination of this Agreement.
13.	ARBITRATION
	Any controversy or claim arising out of or relating to this Agreement, including, without limitation, the making, performance, or interpretation of this Agreement, shall be settled by arbitration.  Unless otherwise agreed, the arbitration shall be conducted in Bend, Oregon, in accordance with the then-current Commercial Arbitration Rules of the American Arbitration Association.  The arbitration shall be held before a single arbitrator (unless otherwise agreed by the parties).  The arbitrator shall be chosen from a panel of attorneys knowledgeable in the field of business law in accordance with the then-current Commercial Arbitration Rules of the American Arbitration Association.  If the arbitration is commenced, the parties agree to permit discovery proceedings of the type provided by the Oregon Rules of Civil Procedure both in advance of, and during recesses of, the arbitration hearings.  The parties agree that the arbitrator shall have no jurisdiction to consider evidence with respect to or render an award or judgment for punitive damages (or any other amount awarded for the purpose of imposing a penalty).  The parties agree that all facts and other information relating to any arbitration arising under this Agreement shall be kept confidential to the fullest extent permitted by law.
14.	GOVERNING LAW
	This Agreement shall be governed by and construed in accordance with the laws of the state of Oregon
15.	ATTORNEY FEES
	If any suit or action is filed by any party to enforce this Agreement or otherwise with respect to the subject matter of this Agreement, the prevailing party shall be entitled to recover reasonable attorney fees incurred in preparation or in prosecution or defense of such suit or action as fixed by the trial court, and if any appeal is taken from the decision of the trial court, reasonable attorney fees as fixed by the appellate court.
16.	NOTICES
	All notices required to be sent by either party under this Agreement will be sent to the addresses set forth below, or to such other address as may subsequently be designated in writing:
	If to APT: Advanced Power Technology, Inc. 000 X.X. Xxxxxxxx Xxxxxx Xxxx, Xxxxxx 00000 XXX Attention:  Xxxxxxx Xxxxxxxx Title:  Vice President, Manufacturing Operations Telephone:  (000) 000-0000 Fax: 000-000-0000 e-mail: xxxxxxxx@xxxxxxxxxxxxx.xxx
	If to EPISIL: EPISIL, Inc. Xx 0 Xxxxxxxx Xxxx II Science Based Industrial Park, Hsin-Chu, Taiwan, R.O.C. Attention:  K. S. Liao Title:  Sales Manager, Sales Department, Device Foundry Telephone:  (000)-0-000-0000 Fax: (000)-0-000-0000 e-mail: xxxxxx@xxxxxx.xxx
17.	AMENDMENTS
	Only an instrument in writing executed by all the parties may amend this Agreement.
18.	ENTIRE AGREEMENT
	This document is the entire understanding between EPISIL and APT with respect to the subject matter hereof and merges all prior Agreements, dealings and negotiations.  The terms of this Agreement shall govern the Sales and purchase of Wafers and Good Die.  The parties recognize that the Exhibits to this Agreement will have to be amended or exchanged, as the case may be, from time to time.  No modification, alteration or amendment shall be effective unless in writing and signed by both parties.  No waiver of any breach shall be held to be a waiver of any other or subsequent breach.

AGREED TO:
Advanced Power Technology, Inc.	EPISIL, Inc.
By: Xxxxxxx X. Xxxxxxxx	By: K.S. Liao
Title: Vice President, Manufacturing Operations	Title: Sales Manager
Date: March 7, 2001	Date: March 13, 2001

EXHIBIT 1: List of Die Types – [*]

EXHIBIT 2:  Specification of Processes

1.          APT Lot Traveler
2.          APT Processing Specifications
3.          APT Material Specifications
4.          APT Control and Inspection Specifications
5.          APT Mask Tooling, Procurement and Inspection Specifications
6.          Test Programs
7.          Mask Database

EXHIBIT 3:  TBD

This exhibit will contain a mutually agreed upon set of specifications to which EPISIL will produce wafers for APT.

EXHIBIT 4:  Qualification Plan and Procedure [*]

EXHIBIT 5: [*]