TECHNOLOGY LICENSING AND TRANSFER AGREEMENT
CONFIDENTIAL PORTIONS OF THIS DOCUMENT HAVE BEEN DELETED AND FILED SEPARATELY
WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO A REQUEST FOR
CONFIDENTIAL TREATMENT
This Technology Licensing and Transfer Agreement ("Agreement") is entered
into this 11th day of March, 1997 (the "Effective Date") by and between NATIONAL
SEMICONDUCTOR CORPORATION, a Delaware corporation with a principal place of
business at 0000 Xxxxxxxxxxxxx Xxxxx, Xxxxx Xxxxx, Xxxxxxxxxx 00000 (hereinafter
"National") and XXXXXXXXX SEMICONDUCTOR CORPORATION, a Delaware corporation with
a principal place of business at 000 Xxxxxxx Xxxxxx, Xxxxx Xxxxxxxx, Xxxxx,
00000 (hereinafter "Fairchild"). Either National or Fairchild may be referred to
herein as a "Party" or together as the "Parties," as the case may require.
RECITALS
WHEREAS, the Parties have entered into an Asset Purchase Agreement, of
even date herewith (hereinafter "Purchase Agreement"), under which Fairchild is
acquiring certain of the assets of National's Logic, Memory and Discrete Power
and Signal Business Units as historically conducted and accounted for (including
Flash Memory, but excluding Public Networks, Programmable Products and Mil Logic
Products)(hereinafter the "Business"); and
WHEREAS, pursuant to the transactions contemplated in the Purchase
Agreement, Fairchild is acquiring National's manufacturing facilities in South
Portland, Maine (excluding the 8-inch fab and related facilities); West Jordan,
Utah; Penang, Malaysia; and Cebu, Philippines (the "Facilities"); and
WHEREAS, after the Closing Date, Fairchild will own and operate the
Facilities; and
WHEREAS, National is the owner or licensee of certain intellectual
property that will be utilized by Fairchild in the operation of the Business;
and
WHEREAS, in order to support the continued and uninterrupted operation of
the Business following the Closing, the Parties desire to enter into this
Agreement, pursuant to which National will assign, license or sublicense (as the
case may be) to Fairchild certain intellectual property; and
WHEREAS, the Parties are executing on the date hereof the Purchase
Agreement, the Fairchild Foundry Services Agreement, the Mil/Aero Wafer and
Services Agreement, the Fairchild Assembly Services Agreement, the Transition
Services Agreement, the National Foundry Services Agreement, the National
Assembly Services Agreement and certain other agreements related thereto;
NOW, THEREFORE, in furtherance of the foregoing premises and in
consideration of the mutual covenants and obligations hereinafter set forth, the
Parties hereto, intending to be legally bound hereby, do agree as follows:
1.0 DEFINITIONS
Unless otherwise provided herein, the terms listed below shall have the
following meaning:
1.1 "ABIC Process": Any of the wafer processes utilizing bipolar
transistors having self-aligned poly silicon emitters in combination
with the formation of a reacted layer of metal-silicide over the
base and emitter in further combination with CMOS processes, as
described in Exhibit 1.1.
1.2 "Affiliate": Any Person controlling, controlled by, or under common
control with a Party, whether directly or indirectly.
1.3 "Assigned Patents": Patents or patent applications owned or
controlled by National which cover a Business Product, as set forth
in Exhibit 1.3.
1.4 "Assigned Technology": Any and all National Intellectual Property
assigned to Fairchild under this Agreement.
1.5 "Assigned Trademarks": (i) U.S. trademarks owned or controlled by
National which are set forth in Exhibit 1.5, (ii) trademarks, for
any jurisdiction, owned or controlled by National that correspond to
a trademark set forth in Exhibit 1.5 and (iii) any trademark rights,
other than rights in the name Xxxxxxxxx Research Center, that
National has in the use of "Fairchild" or "Xxxxxxxxx Semiconductor".
1.6 "Best Efforts": Best Efforts require that the obligated party make a
diligent, reasonable and good faith effort to accomplish the
applicable objective. Such obligation, however, does not require any
significant expenditure of funds or the incurrence of any
significant liability on the part of the obligated party, nor the
incurrence of any expense or liability which is unreasonable in
light of the related objective, nor does it require that the
obligated party act in a manner which would otherwise be contrary to
prudent business judgment or normal commercial practices in order to
accomplish the objective. The fact that the objective is not
actually accomplished is no indication that the obligated party did
not in fact utilize its Best Efforts in attempting to accomplish the
objective.
1.7 "Business Product": A Logic Product, Memory Product or Discrete
Product.
1.8 "Business Product-Specific Software": Software or electronic data
specifically associated with a Business Product, including without
limitation, simulation software for a Business Product, design
software for a Business Product, test software for a Business
Product, characterization software for a Business Product and CAD
files for a Business Product. Business Product-Specific Software
does not include software of general application, but does include
data files that apply specifically to a Business Product.
1.9 "Closing": the consummation of the transactions contemplated by the
Purchase Agreement.
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1.10 "Closing Date": The date on which the Closing occurs.
1.11 "Confidential Information": (i) all proprietary information of
National which is not publicly known and is in the possession of, or
disclosed by National to, Fairchild or a representative of Fairchild
and relating to National's business, including but not limited to
National's Intellectual Property and proprietary business
information and (ii) all proprietary information of Fairchild which
is not publicly known and is in the possession of, or disclosed by
Fairchild to, National or a representative of National and relating
to Xxxxxxxxx'x business, including but not limited to Xxxxxxxxx'x
Intellectual Property and proprietary business information.
1.12 "Co-owned Copyrights": The National Copyrights for the materials
which are directed to or related to Business Products.
1.13 "Co-owned Maskworks": Maskworks owned or controlled by National
employed in the manufacture of a Business Product. Exhibit 1.13 sets
forth the registered maskworks employed in the manufacture of
Business Products.
1.14 "Derivative Product": Any product that:
(i) was derived from or based upon a Business Product or fulfills
substantially the same function as a Business Product (as
determined from said product's datasheet);
(ii) was designed exclusively by one or more Permitted Designer(s);
and
(iii) involves or embodies Licensed Technology or Assigned
Technology in its structure, design or manufacture.
1.15 "Discrete Product": Any product (i) manufactured, marketed, under
design or development or sold by the National Discrete Power
Business Unit, as defined in the Level 95 Report on National
Semiconductor Part Numbers, or the National Discrete Signal Business
Unit, as defined in the Level 95 Report on National Semiconductor
Part Numbers, as of the Closing Date or (ii) those products listed
on Exhibit 1.15 which were historically manufactured by the National
Discrete Power Business Unit or the National Discrete Signal
Business Unit.
1.16 "Fairchild": Xxxxxxxxx Semiconductor Corporation and its
Subsidiaries.
1.17 "Intellectual Property": (i) discoveries, inventions, designs,
processes, methods, instruments, systems, test formulas, computer
programs, data, data assemblies and other trade secrets; (ii)
patents and patent applications; (iii) mask works; (iv) copyrights;
and (v) trademarks.
1.18 "Knowledge": the actual knowledge of the individuals whose names are
set forth on Exhibit 1.18, after reasonable investigation.
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1.19 "Licensed Patent": A patent or patent application owned or
controlled by National, or for which National has a right to
sublicense, the claims of which cover manufacture, packaging, use,
sale, offering for sale, importation, design or development of a
Business Product or Derivative Product or the conduct or use of any
Licensed Process. The Licensed Patents are set forth in Exhibit
1.19.
1.20 "Licensed Process": A process (i) utilized, as of the Closing Date,
in any one of the Facilities, other than the ABIC Process, or (ii)
historically utilized in any one of the Facilities and which is set
forth in Exhibit 1.20.
1.21 "Licensed Technology": Any Licensed Patent or Licensed Trade Secret.
1.22 "Licensed Trade Secret": Any non-publicly known discovery,
invention, process, design, method, process flow information,
instrument, system, test formula or other trade secret used in the
manufacture of a Business Product or Derivative Product or used in
any Licensed Process.
1.23 "Logic Product": Any product (i) manufactured, marketed, under
design or development or sold by the National Logic Business Unit,
as defined in the Level 95 Report on National Semiconductor Part
Numbers (excluding (a) Public Network Products and Programmable
Products, each as defined in the Level 95 Report on National
Semiconductor Part Numbers, and (b) Mil Logic Products, as defined
in Exhibit B to the Mil/Aero Wafer and Services Agreement of even
date herewith between the parties hereto), as of the Closing Date or
(ii) those products listed on Exhibit 1.23 which were historically
manufactured by the National Logic Business Unit.
1.24 "Memory Product": Any product (i) manufactured, marketed, under
design or development or sold by the National Memory Business Unit,
as defined in the Level 95 Report on National Semiconductor Part
Numbers (including, but not limited to, Flash Memory Products, as
defined in the Level 95 Report on National Semiconductor Part
Numbers), as of the Closing Date or (ii) those products listed on
Exhibit 1.24 which were historically manufactured by the National
Memory Business Unit (but excluding DRAM and SRAM Memory Products).
1.25 "National Copyright": Any copyright, whether or not registered,
which is owned or controlled by or licensed to National.
1.26 "National Foundry Product": A product manufactured by Fairchild for
National under the Fairchild Foundry Services Agreement or Mil/Aero
Wafer and Services Agreement in the Wafer Fabrication Facilities.
1.27 "National": National Semiconductor Corporation and its Subsidiaries.
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1.28 "National Intellectual Property": Any and all intellectual property
owned or controlled by or licensed to National with a right to
sublicense on the Closing Date.
1.29 "National Trade Secret": A discovery, invention, process, design,
method, instrument, system, test formula, computer program, data,
data assembly or other trade secret owned or controlled by or
licensed to National with a right to sublicense.
1.30 "Permitted Designer": Any one or more of (i) National, (ii)
Fairchild, (iii) any design house or designer that does not
manufacture semiconductor devices, and (iv) any design house or
designer that (1) does not manufacture or sell any semiconductor
device which competes during the designated time period with a
semiconductor device that National publicly markets and (2) is not
an Affiliate of a Person that manufactures or sells any
semiconductor device that competes during the designated time period
with a semiconductor device that National publicly markets, wherein
the designated time period is the period from the Closing Date
through to the first commercial sale of the Derivative Product to
which the design house or designer contributed pursuant to Section
1.14.
1.31 "Person": An individual, partnership, joint venture, corporation,
trust, estate, incorporated organization, government or any
department or agency thereof, or other entity.
1.32 "Public Information": Information publicly known, or contained in
published data sheets, published specifications, published patents,
and other published technical writings.
1.33 "Subsidiary": Any corporation, partnership, joint venture or similar
entity that is more than fifty percent (50%) owned or controlled by
a Party; provided, however, that any such entity shall no longer be
deemed a Subsidiary if such ownership or control ceases to exist.
1.34 "Wafer Fabrication Facilities": The wafer fabrication facilities
existing and owned by National at South Portland, Maine, excluding
the 8-inch fabrication facility in South Portland of which National
is retaining ownership, and at West Jordan, Utah, transferred to
Fairchild from National pursuant to the Purchase Agreement.
2.0 LICENSES AND ASSIGNMENTS
2.1 TRADEMARKS:
(a) National hereby assigns all of its right, title and
interest, including associated goodwill, in Assigned Trademarks to
Fairchild. National shall by the Closing Date execute and deliver to
Fairchild all instruments necessary to execute and record the
transfer of the Assigned Trademarks. National represents and
warrants that to its Knowledge the U.S. trademarks set forth in
Exhibit 1.5
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are free and clear of all liens, encumbrances and adverse claims and
are free of all licenses to third parties except as set forth in
Exhibit 2.1(a). At the Closing, National shall provide Fairchild
with all of its files for each trademark registration or trademark
registration application included under Assigned Trademarks.
Fairchild assumes no obligation to prosecute, maintain, enforce or
defend the Assigned Trademarks or to otherwise undertake any
proceeding, judicial or otherwise, in reference to the Assigned
Trademarks; provided, however, that if Fairchild determines to
abandon any Assigned Trademark Fairchild shall give at least 90 days
prior written notice to National and offer to assign such Assigned
Trademark to National. National shall have notified Fairchild prior
to the Closing Date of any judicial or administrative proceedings
involving the Assigned Trademarks of which it has Knowledge
including, but not limited to, (i) proceedings asserting
infringement, invalidity or unenforceability and (ii) opposition,
concurrent use or cancellation proceedings. National retains sole
ownership of any rights in the name Xxxxxxxxx Research Center.
(b) In a first transitional trademark license, subject to the
terms of this Agreement, for any trademark owned or controlled by
National that is not an Assigned Trademark but that is used in
connection with a Business Product so as to be visible to customers
without magnification (e.g., outside of the package), National
hereby grants Fairchild a limited worldwide, paid-up, royalty-free,
non-exclusive license under such trademarks to make, have made, use,
offer for sale, promote, affix upon, import, package, sell or modify
any Business Product. Fairchild shall have no right to sublicense
such trademarks. This license under Section 2.1(b) is granted for
transition purposes only and Fairchild agrees to use its Best
Efforts to cease such use of National trademarks as soon as
practicable, but not later than the second anniversary of the
Closing Date.
(c) In a second transitional trademark license, subject to the
terms of this Agreement, for any trademark owned or controlled by
National that is not an Assigned Trademark but that is used in
connection with a Business Product, National hereby grants Fairchild
a limited worldwide, paid-up, royalty-free, non-exclusive license
under such trademarks, limited to use of such trademark as embedded
in Business Products, maskworks and Business Product-Specific
Software, to design, develop, make, have made, use, offer for sale,
promote, affix upon, import, package, sell or modify any Business
Product. Fairchild shall have no right to sublicense such
trademarks. This license under Section 2.1(c) is granted for
transition purposes only and Fairchild agrees to use its Best
Efforts to cease its own such use of National trademarks as soon as
practicable, but not later than such time as the Business Product is
discontinued or replaced with a redesigned version.
(d) In a third transitional trademark license, subject to the
terms of this Agreement, for any trademark owned or controlled by
National that is not an Assigned Trademark, National hereby grants
Fairchild a limited worldwide, paid-up, royalty-free, non-exclusive
license under such trademarks, limited to use of such trademark in
customer specifications, drawings or similar documents
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referring to Business Products. This license under Section 2.1(d)
includes a covenant by National not to xxx Xxxxxxxxx'x customers for
use of customer specifications, drawings or similar documents
referring to Business Products that incorporate such National
trademarks. The Parties acknowledge that it is in both of their
interests to have such customer specifications, drawings or similar
documents amended to remove, where commercially feasible, such
National trademarks and replace them with corresponding Fairchild
trademarks.
(e) Fairchild shall apply the trademarks licensed hereunder
only in connection with Business Products manufactured in accordance
with the standards of quality comparable to those employed by
National prior to the Closing. With respect to Business Products
associated with a trademark licensed hereunder, National shall have
the right, not more often than annually, at reasonable times during
normal business hours, and upon reasonable prior notice, to examine
Business Products manufactured by Fairchild at Xxxxxxxxx'x
facilities to confirm their compliance with the applicable standards
of quality.
2.2 PATENTS:
(a) Subject to the terms of this Agreement, including the
exclusion set forth in this Section 2.2(a), National hereby grants
to Fairchild a worldwide, paid-up, royalty-free, non-exclusive
license under Licensed Patents to design, develop, make, have made,
use, offer for sale, import, package, sell or modify any Business
Product or Derivative Product for the life of the last to expire
Licensed Patent. Fairchild shall have no right to sublicense
Licensed Patents. This license to Fairchild excludes the right to
use the ABIC Process. National assumes no obligation to prosecute,
maintain, enforce or defend the Licensed Patents or to otherwise
undertake any proceeding, judicial or otherwise, in reference to the
Licensed Patents.
(b) National hereby assigns all its right, title and interest,
including the right to xxx for pre-Closing infringement, in Assigned
Patents to Fairchild. National shall by the Closing Date execute and
deliver, or cause to be executed and delivered by the inventor, to
Fairchild all instruments necessary to execute and record the
transfer of the Assigned Patents. National represents and warrants
that to its Knowledge the Assigned Patents are free and clear of all
liens, encumbrances and adverse claims and are free of all licenses
to third parties except as set forth in Exhibit 2.2(b). For each
Assigned Patent, National shall provide Fairchild, at the Closing,
with all of its files (including without limitation the prosecution
histories) or full and complete copies of such documents, at the
Closing. Fairchild assumes no obligation to prosecute, maintain,
enforce or defend the Assigned Patents or to otherwise undertake any
proceeding, judicial or otherwise, in reference to the Assigned
Patents. National has notified Fairchild prior to the Closing Date
of any claims or judicial or administrative proceedings of which it
has Knowledge involving the Assigned Patents including, but not
limited to, (i) proceedings asserting infringement, invalidity, or
unenforceability or (ii) opposition, nullification, interference,
re-examination or reissue proceedings.
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(c) Fairchild hereby grants to National a worldwide, paid-up,
royalty-free, non-exclusive license under Assigned Patents for the
life of the last to expire Assigned Patent. National shall have the
right to grant sublicenses under its license to Assigned Patents
solely to the extent necessary (i) for the operation of a joint
venture in which National owns more than fifty percent (50%) of the
controlling securities or other voting rights, (ii) for National to
authorize third parties to second source National-designed products
or (iii) for National to jointly develop products with third parties
which are to be sold by National and/or a National development
partner; provided, however, that nothing in this Section 2.2(c)
shall be interpreted to modify National's obligations under the
covenant not to compete set forth in Section 5.6 of the Purchase
Agreement.
2.3 MASKWORKS: Subject to the terms of this Agreement, National hereby
grants to Fairchild an undivided interest in the Co-owned Maskworks
while reserving an undivided interest for National. Neither
Fairchild nor National shall have the right to sublicense any
Co-owned Maskworks. In its use of the Co-owned Maskworks containing
any National trademark, Xxxxxxxxx'x use of such a trademark shall be
governed by Section 2.1(c); provided, however, that nothing in this
Section 2.3 shall be interpreted to modify National's obligations
under the covenant not to compete set forth in Section 5.6 of the
Purchase Agreement, and provided further that National shall not
license the right to use such Co-owned Maskworks in any manner
competitive with any Business Product.
2.4 TRADE SECRETS: Subject to the terms of this Agreement, National
hereby grants to Fairchild a perpetual worldwide, paid-up,
royalty-free, non-exclusive license under Licensed Trade Secrets to
design, develop, make, have made, use, offer for sale, import,
package, sell or modify any Business Product or Derivative Product.
Fairchild shall have no right to sublicense Licensed Trade Secrets.
This license to Fairchild excludes the right to use the ABIC
Process. Fairchild warrants that it will not use any National trade
secret that is not licensed under this Agreement unless such trade
secret information is obtained independently by rightful means.
National shall not disclose Licensed Trade Secrets to a third party
without imposing on the third party confidentiality provisions
substantially the same as those set forth in Section 5.0.
2.5 COPYRIGHTS: National hereby grants to Fairchild an undivided
interest in the Co-owned Copyrights while reserving an undivided
interest for National. In its use of copyrighted material containing
a National trademark or reference to National, Xxxxxxxxx'x such use
shall be governed by Section 2.1. Purchase of embedded test or
equipment or other tools sold under the Purchase Agreement will
include any license originally purchased therewith or purchased at a
later date for use with such tools, equipment or embedded test. Such
licenses shall be accounted for as an asset and will be transferred
under the Purchase Agreement.
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2.6 PROCESSES UTILIZED IN THE FACILITIES: Subject to the terms of this
Agreement, National hereby grants to Fairchild a worldwide, paid-up,
royalty-free, non-exclusive license, without the right to
sublicense, to conduct or use any Licensed Process.
2.7 FOUNDRY-RELATED INTELLECTUAL PROPERTY: All discoveries, inventions
and improvements to the ABIC Process made by Fairchild shall be
owned by National.
2.8 PRODUCT-SPECIFIC SOFTWARE: Subject to the terms of this Agreement,
National hereby grants to Fairchild a worldwide, paid-up,
royalty-free, non-exclusive license to use any Business
Product-Specific Software which National is permitted to license
without payment of any consideration to any third party other than
any consideration for which Fairchild agrees to reimburse National.
3.0 NO IMPLIED LICENSES
Except for the licenses expressly granted in this Agreement, neither Party
grants to the other Party by implication, estoppel or otherwise any
license or other right to any of its Intellectual Property. Neither Party
grants any license or release expressly, by implication, by estoppel or
otherwise to any third party.
4.0 INVENTIONS AND PATENT APPLICATIONS
Subject to Section 2.0, any discovery, improvement or invention first
conceived or reduced to practice, as such terms are used in U.S. patent
law, by National or Fairchild personnel up to and including the Closing
Date shall be the sole and exclusive property of National, and National
shall retain any and all rights to file at its sole discretion any patent
applications thereon. Subject to Section 2.0, any discovery, improvement
or invention first conceived or reduced to practice by Fairchild personnel
after the Closing Date shall be the sole and exclusive property of
Fairchild, with respect to which, to the extent that the same is based on
Licensed Technology and is first conceived or reduced to practice by
Fairchild within one (1) year after the Closing Date, Fairchild grants to
National a worldwide, non-exclusive, royalty-free license, without the
right to grant sublicenses except as set forth in Section 6.2(g). Any
discovery, improvement or invention first conceived or reduced to practice
by National personnel after the Closing Date shall be the sole and
exclusive property of National, with respect to which, to the extent that
the same is related to the Business and is first conceived or reduced to
practice by National within one (1) year after the Closing Date, National
grants to Fairchild a worldwide, non-exclusive, royalty-free license,
without the right to grant sublicenses. Subject to Section 2.0, in the
event that personnel of National and Fairchild make joint discoveries,
improvements or inventions, the same shall be jointly owned with each
Party having the right to exploit and grant licenses in respect thereto
and in respect to any patents arising therefrom, without accounting to the
other Party.
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5.0 CONFIDENTIALITY
5.1 Duty to Protect: Fairchild and National acknowledge that the
Confidential Information may contain trade secrets and other
sensitive information and agrees not to disclose or deliver to a
third party any Confidential Information of the other Party, unless
in connection with its business and provided that the third party
executes a confidentiality agreement substantially the same as this
Section 5.0 and agrees to a use restriction recognizing any
limitations on Xxxxxxxxx'x sublicense rights. Fairchild and National
further agree to prevent the unauthorized use, copying,
dissemination, or publication of any Confidential Information by
using at least the same degree of care (but no less than a
reasonable degree of care) as it uses to protect its own
Confidential Information and material of like nature.
5.2 Exceptions: (i) Notwithstanding the above, this Agreement imposes no
obligation on Fairchild with respect to information that is or
becomes a matter of public knowledge through no fault of Fairchild,
is rightfully received by Fairchild from a third party without a
duty of confidentiality, is disclosed by National to a third party
without a duty of confidentiality imposed upon the third party, or
is independently developed by Xxxxxxxxx; (ii) notwithstanding the
above, this Agreement imposes no obligation on National with respect
to information that is or becomes a matter of public knowledge
through no fault of National, is rightfully received by National
from a third party without a duty of confidentiality, is disclosed
by Fairchild to a third party without a duty of confidentiality
imposed upon the third party, or is independently developed by
disclosure of any Confidential Information by Fairchild shall not be
precluded if such disclosure is in response to a valid order of a
court or other government body ("Order"), and if Fairchild promptly
notifies National of the Order, and makes a good faith effort, at
National's expense, to obtain a protective order requiring that any
information disclosed under the Order remains confidential and be
used only for the disclosure of any Confidential Information by
National shall not be precluded if such disclosure is in response to
an Order, and if National promptly notifies Fairchild of the Order,
and makes a good faith effort to obtain a protective order requiring
that any information disclosed under the Order remains confidential
and be used only for the Order's purpose; (v) disclosure by
Fairchild of any Assigned Patent shall not be precluded; and (vi)
disclosure by either National or Fairchild of any Co-owned Maskwork
shall not be precluded.
5.3 Term: The confidentiality obligations of the Parties under this
Agreement shall terminate with respect to any specific Confidential
Information five (5) years from the date of receipt thereof.
6.0 REPRESENTATIONS & WARRANTIES; DISCLAIMERS; INDEMNITY
6.1 REPRESENTATIONS & WARRANTIES
National hereby represents that it has the right to make the license
grants and
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assignments provided herein and otherwise to perform under this
Agreement, and that such license grants and assignments do not
violate or conflict with any agreement to which National or any of
its Affiliates or subsidiaries is a party or by which any of them is
bound.
6.2 INDEMNIFICATION
(a) National shall indemnify, save and hold harmless
Fairchild, its Affiliates and Subsidiaries and its and their
respective officers, directors, employees and agents from and
against any and all costs, losses, liabilities, damages, law suits,
deficiencies, claims, demands, and expenses, including without
limitation all amounts paid in investigation and attorney's fees,
all net of all amounts recovered under insurance policies, if any,
relating to the foregoing as well as all costs of enforcement of or
collection upon this indemnification (herein "damages"), arising out
of any breach of any representation, warranty or covenant of
National contained herein.
(b) Fairchild shall indemnify, save and hold harmless
National, its Affiliates and Subsidiaries and its and their
respective officers, directors, employees and agents from and
against any and all damages arising out of any breach of any
representation, warranty or covenant of Fairchild contained herein.
(c) Subject to the limitations set forth in paragraphs (c)-(h)
of this Section 6.2, National shall indemnify, save and hold
harmless Fairchild, its Affiliates and Subsidiaries and its and
their respective officers, directors, employees and agents from and
against any and all damages (including, for purposes of this Section
6.2(c) only, damages resulting from profits lost or foregone, with
such lost or foregone profits limited to profits from five (5) years
of lost or foregone sales of each relevant product) arising out of
any claims by a third party that the design, development, making,
having made, use, offer for sale, import, package, sale or
modification of (1) a Discrete Product satisfying clause (i) of
Section 1.15 or a Derivative Product derived or based upon such a
Discrete Product, (2) a Logic Product satisfying clause (i) of
Section 1.23 or a Derivative Product derived or based upon such a
Logic Product or (3) a Memory Product satisfying clause (i) of
Section 1.24 or a Derivative Product derived or based upon such a
Memory Product infringes any patent, patent application (in
jurisdictions where patent applications can give rise to enforceable
rights), copyright, maskwork or trade secret; provided, however,
that such indemnification shall not apply to a Derivative Product if
the infringement of a third party's Intellectual Property would have
been avoided but for a post-Closing change in manufacturing or
design.
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(d) Infringements or other breaches of Intellectual Property
belonging to third parties that occurred prior to the Closing Date,
and any damages arising therefrom, are the sole responsibility of
National and, for such pre-Closing infringements or breaches,
National shall indemnify, save and hold harmless Fairchild, its
Affiliates and Subsidiaries and its and their respective officers,
directors, employees and agents from and against any and all damages
arising out of any such claims of infringement.
(e) Fairchild agrees that upon its receipt of a claim giving
rise to a claim for indemnity under Section 6.2(c), including,
without limitation, receipt by it of any notification,
communication, demand, assertion, claim, action, judicial
proceeding, administrative proceeding, or other proceeding by any
third party that Fairchild infringes or has misappropriated such a
third party's Intellectual Property, Fairchild will give prompt
written notice thereof to National.
(f) National's obligation to indemnify under Section 6.2(c)
for claims of infringement of patents, patent applications,
copyrights or maskworks or claims of misappropriation of trade
secrets made by third parties is limited as follows:
(i) with respect to Intellectual Property asserted against
Fairchild that is cross-licensed to National under
National's cross-license agreements existing on the
Closing Date, National shall indemnify for claims made
during a term of three (3) years after the Closing Date;
and
(ii) with respect to all other Intellectual Property asserted
against Fairchild, National shall indemnify for claims
made during a term of two (2) years after the Closing
Date.
For any claims for which National's obligation to indemnify is
triggered during the respective indemnity term under Sections
6.2(f)(i) or 6.2(f)(ii), National shall indemnify for the
enforceable life of the asserted patent, patent subsequently issuing
on a patent application having enforceable rights, maskwork,
copyright or trade secret. On or before the Closing Date National
shall provide Fairchild with a copy of each cross-license agreement
that it has with a third party as of the Closing Date. Such
cross-license agreements are listed in Exhibit 6.2(f) and shall be
treated by Fairchild as National Confidential Information.
(g) National shall have the right, at its own cost and
expense, to contest and defend by all appropriate legal proceedings
any claim with respect to which it is called upon to indemnify
Fairchild under the terms of this Section 6.2, and any such contest
or defense may be conducted in the name and on behalf of Fairchild
and/or National, as may be appropriate. Fairchild shall provide all
reasonable information and assistance, at National's sole expense,
as National may request, including, if commercially reasonable,
redesigning Xxxxxxxxx'x products to make them non-infringing. The
commercial reasonableness of a
12
redesign of a product includes, without limitation, the retention of
all performance features that materially affect the marketability of
the product, the lack of any material affect on Xxxxxxxxx'x ability
to obtain orders and to obtain and retain customers for the product,
and the avoidance of any material increased manufacturing costs.
National shall be permitted to settle such claims, upon reasonable
prior notice to Fairchild, at its sole expense, provided Fairchild
shall have no obligation for future expense or payment and provided
that the settlement agreement shall not result in any requirement
that Fairchild cease, alter (except for a redesign provided for by
this Section 6.2(g)) or curtail the manufacturing, importation,
marketing or sale of any product. Fairchild shall have the right,
but not the obligation, to participate in such legal proceedings
with counsel of its own selection and at its own expense. Fairchild
agrees that National shall be authorized in the settlement of such
claims to grant licenses under patents owned or controlled by
Fairchild, provided that Fairchild receives from the licensee of
such patents a reciprocal patent license of comparable weight and
scope.
(h) Fairchild shall not solicit, directly or indirectly,
claims or actions by Intellectual Property holders during the
respective indemnity terms under Sections 6.2(f)(i) or 6.2(f)(ii).
In the event Fairchild initiates an Intellectual Property claim
(including, without limitation, a unilateral offer of license)
against a third party, National shall not be obligated to provide
any indemnity hereunder to a counterclaim or similar action
asserting infringement initiated by the third party after receiving
Xxxxxxxxx'x claim. Disclosures made in accordance with Section 7.12
(Publicity) shall not be deemed solicitations limited by this
Section 6.2(h).
6.3 National represents and warrants that it has provided Fairchild
through assignment or license with all National Intellectual
Property needed to make all Business Products and carry out all
Licensed Processes as National made them as of the Closing Date.
6.4 DISCLAIMERS
EACH PARTY HEREBY DISCLAIMS MAKING ANY REPRESENTATIONS OR WARRANTIES
RELATING TO THE SUBJECT MATTER HEREOF, WHETHER ARISING BY
IMPLICATION, ESTOPPEL OR OTHERWISE, OTHER THAN THOSE SET FORTH IN
THIS AGREEMENT.
7.0 GENERAL
7.1 EFFECTIVE DATE: This Agreement shall become effective on the Closing
Date.
7.2 AMENDMENT: This Agreement may be modified only by a written document
signed by duly authorized representatives of the Parties.
13
7.3 FORCE MAJEURE: A Party shall not be liable for a failure or delay in
the performance of any of its obligations under this Agreement where
such failure or delay is the result of conditions beyond the control
of said Party, such as fire, flood, or other natural disaster, act
of God, war, embargo, riot, labor dispute, or the intervention of
any government authority, providing that the Party failing in or
delaying its performance immediately notifies the other Party of its
inability to perform and states the reason for such inability.
7.4 ASSIGNMENT: Neither this Agreement, nor any of its rights, interests
or obligations, may be assigned by a Party without the prior written
consent of the other Party; provided, however, that Fairchild may
assign its rights hereunder as collateral security to any financial
institution providing financing to consummate the transactions
contemplated by the Purchase Agreement or any financial institution
through which such financing is refunded, replaced or refinanced and
any of the foregoing may assign Xxxxxxxxx'x rights hereunder in
connection with a sale of FSC Semiconductor Corporation, Fairchild
or the business in the form then being conducted by Fairchild
substantially as an entirety. This Agreement shall be binding upon
and inure to the benefit of and be enforceable by the successors and
permitted assigns of each Party.
7.5 COUNTERPARTS: This Agreement may be executed simultaneously in two
or more counterparts, each of which shall be deemed an original and
all of which together shall constitute but one and the same
instrument.
7.6 CHOICE OF LAW: This Agreement, and the rights and obligations of the
Parties hereto, shall be interpreted and governed in accordance with
the laws of the State of California, without giving effect to its
conflicts of law provisions, and any litigation concerning this
Agreement shall be brought within the courts located therein.
7.7 WAIVER: Should either of the Parties fail to exercise or enforce any
provision of this Agreement, or waive any right in respect thereto,
such failure or waiver shall not be construed as constituting a
waiver or a continuing waiver of its rights to enforce any other
provision or right.
7.8 SEVERABILITY: If any provision of this Agreement or the application
thereof to any situation or circumstance shall be invalid or
unenforceable, the remainder of this Agreement shall not be
affected, and each remaining provision shall be valid and
enforceable to the fullest extent, unless the deletion of such
provision shall cause this Agreement to become materially adverse to
any Party, in which event the Parties shall use their respective
Best Efforts to arrive at an accommodation which best preserves for
the Parties the benefits and obligations of the offending provision.
14
7.9 LIMITATION OF LIABILITY: EXCEPT AS SET FORTH IN THIS AGREEMENT IN NO
EVENT SHALL EITHER PARTY BE LIABLE FOR ANY INDIRECT, SPECIAL,
INCIDENTAL OR CONSEQUENTIAL DAMAGES RESULTING FROM THE OTHER PARTY'S
PERFORMANCE OR FAILURE TO PERFORM UNDER THIS AGREEMENT, OR THE
FURNISHING, PERFORMANCE, OR USE OF ANY GOODS OR SERVICES SOLD
PURSUANT HERETO, WHETHER DUE TO BREACH OF CONTRACT, BREACH OF
WARRANTY, NEGLIGENCE OR OTHERWISE, REGARDLESS OF WHETHER THE
NONPERFORMING PARTY WAS ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
OR NOT.
7.10 EFFECT OF HEADINGS: The headings and sub-headings contained herein
are for information purposes only and shall have no effect upon the
intended purpose or interpretation of the provisions of this
Agreement.
7.11 INTEGRATION: This Agreement constitutes the entire agreement and
understanding between the Parties with respect to the subject matter
of this Agreement and integrates all prior discussions and proposals
(whether oral or written) between them related to the subject matter
hereof.
7.12 PUBLICITY: Neither Party shall, without the approval of the other
Party, make any press release or other public announcement
concerning the terms of the transactions contemplated by this
Agreement, except as and to the extent that any such Party shall be
so obligated by law, in which case such Party shall use its Best
Efforts to advise the other Party thereof and the Parties shall use
their Best Efforts to cause a mutually agreeable release or
announcement to be issued; provided, however, that the foregoing
shall not preclude communications or disclosures necessary to (a)
implement the provisions of this Agreement or (b) comply with
accounting and Securities and Exchange Commission disclosure
obligations. The Parties will each provide the other Party with a
reasonable opportunity to review and comment on any references to
that other Party made in a proposed public disclosure document (and
shall not include any such references to that other Party in the
public disclosure document without the written consent of that other
Party, which consent shall not be unreasonably withheld or delayed)
in any written materials that are intended to be filed with the
Securities and Exchange Commission in connection with obtaining
financing or intended to be distributed to prospective purchasers
pursuant to an offering made under Rule 144A promulgated under the
Securities Act of 1933 in connection with obtaining financing.
7.13 NO PARTNERSHIP OR AGENCY CREATED: The relationship of National and
Fairchild shall be that of independent contractors only. Nothing in
this Agreement shall be construed as making one Party an agent or
legal representative of the other or otherwise as having the power
or authority to bind the other in any manner.
15
7.14 BINDING EFFECT: This Agreement and the rights and obligations
hereunder shall be binding upon and inure to the benefit of the
Parties hereto and to their respective successors and assigns.
7.15 NO INTERPRETATION BASED ON PRIOR DRAFTS: Both Parties acknowledge
that the drafts of this Agreement, and any changes made from one
draft to another, have no probative value in interpreting the intent
of the Parties. Both Parties agree that neither will rely on the
drafts of this Agreement, and any changes made from one draft to
another, to assert an interpretation of this Agreement.
7.16 FURTHER ASSURANCES. Each Party shall cooperate and take such action
as may be reasonably requested by another Party in order to carry
out the provisions and purposes of this Agreement and the
transactions contemplated hereby.
7.17 EXPORT CONTROL: The Parties shall comply with any and all export
regulations and rules now in effect or as may be issued from time to
time by the Office of Export Administration of the United States
Department of Commerce or any other governmental authority which has
jurisdiction relating to the export of technology from the United
States of America.
7.18 NOTICES: Any notice to be made in connection with any right or
obligation arising under this Agreement, shall be provided by
registered mail, telegram, facsimile or telex by one Party to the
other at the following addresses. Said notices shall be deemed to be
effective upon receipt by the receiving Party thereof.
National: National Semiconductor Corporation
0000 Xxxxxxxxxxxxx Xxxxx
X.X. Xxx 00000
M/S 16-135 (Attn: General Counsel)
Xxxxx Xxxxx, XX 00000-0000
FAX: (000) 000-0000
Fairchild: Xxxxxxxxx Semiconductor Corporation
000 Xxxxxxx Xxxxxx
Xxxxx Xxxxxxxx, XX 00000
FAX: (000) 000-0000
Attention: General Counsel
Either Party may change its address by written notice given to the other
Party in the manner set forth above. Notices given as herein provided shall be
considered to have been given seven (7) days after the mailing thereof.
IN WITNESS WHEREOF, The Parties have had this Agreement executed by their
respective authorized officers on the date written below. The persons signing
warrant and represent that they are duly authorized to sign for and on behalf of
the respective Parties.
By and on behalf of By and on behalf of
NATIONAL SEMICONDUCTOR XXXXXXXXX SEMICONDUCTOR
CORPORATION CORPORATION
By: /s/ Xxxx X. Xxxxx III By: /s/ Xxxxxx X. Xxxxxx
-------------------------- --------------------------
Its: Senior V.P Its: Executive V.P.
Date: March 11, 1997 Date: March 11, 1997
16
EXHIBIT 1.1
PATENTS CLAIMING ASPECTS OF THE ABIC PROCESS
ABiC Definition and Exclusions
Exhibit 1.1
--------------------------------------------------------------------------------
Process Name Process Description
--------------------------------------------------------------------------------
ABIC 2LM ABiC-4 with two layers of metal, for use in RF
products. 0.8u BiCMOS
--------------------------------------------------------------------------------
XXXX 0X XXxX-0 with two layers of metal, with a mid-flow
inventory point for subsequent ASIC
personalization. 0.8u BiCMOS
--------------------------------------------------------------------------------
XXXX 0X XXxX-0 with three layers of metal, with a mid-flow
inventory point for subsequent ASIC
personalization. 0.8u BiCMOS
--------------------------------------------------------------------------------
ABIC4L ABiC-4 with four layers of metal, with a mid-flow
inventory point for subsequent ASIC
personalization. 0.8u BiCMOS
--------------------------------------------------------------------------------
ABIC5 2L ABiC-5 with two layers of metal and 0.5u, three
sided emitter, for use in RF products. CMOS remains
at 0.8u.
--------------------------------------------------------------------------------
All wafer processes utilizing bipolar transistors have self-aligned poly silicon
emitters in combination with the formation of a reacted layer of metal-silicide
over the base and emitter, and combination with CMOS processes shall be
considered restricted.
EXHIBIT 1.3
ASSIGNED PATENTS
Patents to be assigned to Fairchild
--------------------------------------------------------------------------------
Patent No. Title
---------- -----
--------------------------------------------------------------------------------
207,858 Increased-Density flash eprom that requires less area to the metal
bit line to drain contacts
--------------------------------------------------------------------------------
363,489 N-IN-1 Device river
--------------------------------------------------------------------------------
404,510 Flash EEPROM memory system for low voltage operation and method
--------------------------------------------------------------------------------
449,564 Flash memory having segmented array for improved operation
--------------------------------------------------------------------------------
512,873 Apparatus for measuring process induced overstress using a single
ploy transistor with a floating gate
--------------------------------------------------------------------------------
572,070 Method for detecting read errors, correcting single bit read errors
and reportion multiple bit read errors
--------------------------------------------------------------------------------
654,103 Low voltage electrically erasable non volatile memory cell
--------------------------------------------------------------------------------
713,827 Power-on reset circuit with zero standby and leakage compensation
--------------------------------------------------------------------------------
4,253,059 EPROM Reliability Test Circuit
--------------------------------------------------------------------------------
4,255,670 Transistor logic tristate output with feedback
--------------------------------------------------------------------------------
4,272,774 Self-aligned floating gate memory and method of manufacture
--------------------------------------------------------------------------------
4,287,433 Transistor logic tri-state device with reduced power dissipation
--------------------------------------------------------------------------------
4,300,398 Apparatus for measuring deflection of a blade upon application of
force thereto
--------------------------------------------------------------------------------
4,311,927 Transistor logic tri-state device with reduced output capacitance
--------------------------------------------------------------------------------
4,321,490 Transistor logic output for reduced power consumption and increased
speed
--------------------------------------------------------------------------------
4,330,723 Transistor logic output device for diversion of xxxxxx current
--------------------------------------------------------------------------------
4,334,157 Data latch with enable signal
--------------------------------------------------------------------------------
4,355,455 Method of manufacture for self-aligned floating gate memory cell
--------------------------------------------------------------------------------
4,357,687 Adaptive word line pull down
--------------------------------------------------------------------------------
4,364,977 Automatic self-adjusting processing apparatus
--------------------------------------------------------------------------------
4,377,857 Electrically erasable programmable read only memory
--------------------------------------------------------------------------------
4,393,473 Random access memory preset circuitry
--------------------------------------------------------------------------------
4,393,476 Random access memory dual word fine recovery circuitry
--------------------------------------------------------------------------------
4,404,080 Molded plating mask
--------------------------------------------------------------------------------
4,423,491 Self-refreshing memory cell
--------------------------------------------------------------------------------
4,435,786 Self-refreshing memory cell
--------------------------------------------------------------------------------
4,441,172 Semiconductor memory byte clear circuit
--------------------------------------------------------------------------------
4,442,509 Bit line powered translinear memory cell
--------------------------------------------------------------------------------
4,442,510 Semiconductor memory byte clear circuit
--------------------------------------------------------------------------------
4,445,205 Semiconductor memory core programming circuit
--------------------------------------------------------------------------------
4,469,723 Plating Control System
--------------------------------------------------------------------------------
4,477,885 Current dump circuit for bipolar memory cell
--------------------------------------------------------------------------------
4,481.430 Power supply threshold activation circuit
--------------------------------------------------------------------------------
4,488.350 Synchronous sense amplifier
--------------------------------------------------------------------------------
4,498,638 Apparatus for maintaining reserve bonding wire
--------------------------------------------------------------------------------
4,519,076 Memory core testing system
--------------------------------------------------------------------------------
Patents to be assigned to Fairchild
--------------------------------------------------------------------------------
Patent No. Title
---------- -----
--------------------------------------------------------------------------------
4,543,595 Bipolar memory cell
--------------------------------------------------------------------------------
4,578,594 Circuit and method for split blas enable/inhibit memory operation
--------------------------------------------------------------------------------
4,581,550 TTL tri-state device with reduced output capacitance
--------------------------------------------------------------------------------
4,581,672 Internal high voltage (Vpp) regulator for integrated circuits
--------------------------------------------------------------------------------
4,594,493 Method and apparatus for forming ball bonds
--------------------------------------------------------------------------------
4,622,575 Integrated circuit bipolar memory cell
--------------------------------------------------------------------------------
4,624,046 Oxide isolation process for standard ram/prom and lateral pnp cell
ram
--------------------------------------------------------------------------------
4,649,297 TTL circuits generating complementary signals
--------------------------------------------------------------------------------
4,654,549 Transistor-transistor logic to emitter coupled logic translator
--------------------------------------------------------------------------------
4,661,727 Multiple phase-splitter TTL output circuit with improved drive
characteristics
--------------------------------------------------------------------------------
4,677,320 Emitter coupled logic to transistor logic translator
--------------------------------------------------------------------------------
4,680,613 Low impedance package for integrated circuit die
--------------------------------------------------------------------------------
4,685,631 Apparatus for feeding bonding wire
--------------------------------------------------------------------------------
4,727,269 Temperature compensated sense amplifier
--------------------------------------------------------------------------------
4,745,580 Variable clamped memory cell
--------------------------------------------------------------------------------
4,771,191 TTL to ECL translator
--------------------------------------------------------------------------------
4,798,305 Adjustable shipping tray
--------------------------------------------------------------------------------
4,817,051 Expandable multi-port random access memory
--------------------------------------------------------------------------------
4,853,646 Temperature compensated bipolar circuits
--------------------------------------------------------------------------------
4,868,424 TTL circuit with increased transient drive
--------------------------------------------------------------------------------
4,903,087 Schottky barrier diode for alpha particle resistant static random
access
--------------------------------------------------------------------------------
4,908,328 High Voltage Power IC Process
--------------------------------------------------------------------------------
4,926,383 BiCMOS write recovery circuit
--------------------------------------------------------------------------------
4,931,665 Master slave voltage reference circuit
--------------------------------------------------------------------------------
4,943,741 ECL/CML emitter follower current switch curcuit
--------------------------------------------------------------------------------
4,945,263 TTL to ECL/CML translator circuit with differential output
--------------------------------------------------------------------------------
4,945,265 ECL/CML pseudo-rail circuit, cutoff driver circuit, and latch
circuit
--------------------------------------------------------------------------------
4,947,058 Transient Performance Enhancement
--------------------------------------------------------------------------------
4,958,090 Non-current hogging dual phase splitter TTL circuit
--------------------------------------------------------------------------------
4,961,010 Output buffer for reducing switching induced noise
--------------------------------------------------------------------------------
4,963,767 Two-level multiplexer
--------------------------------------------------------------------------------
4,972,104 TTL totem pole anti-simultaneous conduction circuit
--------------------------------------------------------------------------------
4,988,898 High speed ECL/CML to TTL translator circuit
--------------------------------------------------------------------------------
4,988,899 TTL gate current source controlled overdrive and clamp circuit
--------------------------------------------------------------------------------
4,996,452 ECL/TTL Tristate Buffer
--------------------------------------------------------------------------------
4,999,812 Architecture for a flash erase EEPROM memory
--------------------------------------------------------------------------------
5,013,938 ECL cutoff driver circuit with reduced standby power dissipation
--------------------------------------------------------------------------------
5,013,941 TTL to ECL/CML translator circuit
--------------------------------------------------------------------------------
5,016,214 Memory cell with separate read and write paths and clamping
transistors
--------------------------------------------------------------------------------
5.021.687 High speed inverting hysteresis TTL buffer curcuit
--------------------------------------------------------------------------------
Patents to be assigned to Xxxxxxxxx
--------------------------------------------------------------------------------
Patent No. Title
---------- -----
--------------------------------------------------------------------------------
5,025,179 ECL clamped cutoff driver circuit
--------------------------------------------------------------------------------
5,029,280 ECL circuit for resistance and temperature bus drop compensation
--------------------------------------------------------------------------------
5,032,743 Skew clamp
--------------------------------------------------------------------------------
5,034,632 High speed TTL buffer circuit and line driver
--------------------------------------------------------------------------------
5,036,222 Output buffer circuit with output voltage sensing for reducing
switching
--------------------------------------------------------------------------------
5,041,721 Machine for counting IC parts in a shipping rail
--------------------------------------------------------------------------------
5,045,729 TTL/ECL Translator Circuit
--------------------------------------------------------------------------------
5,049,763 Anti-noise circuits
--------------------------------------------------------------------------------
5,051,623 TTL tristate circuit for output pulldown transistor
--------------------------------------------------------------------------------
5,051,690 Apparatus and method for detecting vertically propolgated defects
in integrated circuits
--------------------------------------------------------------------------------
5,051,986 Asynchronous priority select logic
--------------------------------------------------------------------------------
5,058,067 Individual bit line recovery circuits
--------------------------------------------------------------------------------
5,056,864 Monophase logic
--------------------------------------------------------------------------------
5,015,224 Low noise integrated circuit and leadframe
--------------------------------------------------------------------------------
5,075,885 ECL eprom with CMOS programming
--------------------------------------------------------------------------------
5,081,374 Output buffer circuit with signal feed forward for reducing
switching induced
--------------------------------------------------------------------------------
5,087,841 TTL to CMOS translating circuits without static current
--------------------------------------------------------------------------------
5,092,774 Mechanically complaint high frequency electrical connector
--------------------------------------------------------------------------------
5,101,124 ECL to TTL translator circuit with improved slow rate
--------------------------------------------------------------------------------
5,101,153 PIN electronics test circuit for ic device testing
--------------------------------------------------------------------------------
5,103,118 High speed anti-undershoot and anti-overshoot circuit
--------------------------------------------------------------------------------
5,118,974 Tristate circuits with fast and slow OE signals
--------------------------------------------------------------------------------
5,132,577 High speed passgate, latch and flip-flop circuits
--------------------------------------------------------------------------------
5,134,315 Synchronous counter terminate count output circuit
--------------------------------------------------------------------------------
5,144,171 High speed differential-feedback cascade sense amplifier
--------------------------------------------------------------------------------
5,153,456 TTL output buffer with temperature compensated Vo clamp circuit
--------------------------------------------------------------------------------
5,173,621 Transceiver with Isolated power rails for ground bounce reduction
--------------------------------------------------------------------------------
5,184,034 State-dependent discharge path circuit
--------------------------------------------------------------------------------
5,204,554 Partial isolation of power rails for output buffer circuits
--------------------------------------------------------------------------------
5,218,243 BiCMOS TTL output buffer circuit with reduced power dissipation
--------------------------------------------------------------------------------
5,220,212 Single Level BiPolar ECL Flip Flop
--------------------------------------------------------------------------------
5,223,745 Power down Xxxxxx Killer circuit
--------------------------------------------------------------------------------
5,227,680 ECL/TTL Translator Circuit
--------------------------------------------------------------------------------
5,233,237 BiCMOS output buffer noise reduction circuit
--------------------------------------------------------------------------------
5,239,270 Water Level Reliability Contact Test Structure and Method
--------------------------------------------------------------------------------
5,248,520 Solder finishing planar leaded flat package integrated circuit leads
--------------------------------------------------------------------------------
5,256,914 Short circuit protection circuit and method for output buffers
--------------------------------------------------------------------------------
5,256,916 TTL to CMOS translating input buffer circuit with dual thresholds
for high dynamic current and low static current
--------------------------------------------------------------------------------
Patents to be assigned to Xxxxxxxxx
--------------------------------------------------------------------------------
Patent No. Title
---------- -----
--------------------------------------------------------------------------------
5,258,665 XX Xxxxxx-Killer circuit for LZ transitions
--------------------------------------------------------------------------------
5,289,056 BiCMOS input buffer circuit with integral passgate
--------------------------------------------------------------------------------
5,310,055 Magazine and shipping tray for lead frames
--------------------------------------------------------------------------------
5,323,068 Lower power low temperature ECL output driver circuit
--------------------------------------------------------------------------------
5,331,224 ICCT leakage current interrupter
--------------------------------------------------------------------------------
5,338,978 Full swing power down buffer circuit with multiple power supply
isolation
--------------------------------------------------------------------------------
5,346,842 Method of making alternate metal/source virtual ground flash EPROM
cell array
--------------------------------------------------------------------------------
5,357,471 Fault locator architecture and method for memories
--------------------------------------------------------------------------------
5,359,301 Process-, temperature-, and voltage-compensation for ECL delay cells
--------------------------------------------------------------------------------
5,359,301 Process- temperature and voltage compensation for ECL delay cells
--------------------------------------------------------------------------------
5,365,479 Row decoder and driver with switched-bias bulk regions
--------------------------------------------------------------------------------
5,367,645 Modified interface for parallel access EPROM
--------------------------------------------------------------------------------
5,371,030 Method of fabricating field oxide isolation for a contactless flash
EPROM array
--------------------------------------------------------------------------------
5,379,254 Asymmetrical alternate metal virtual ground EPROM array
--------------------------------------------------------------------------------
5,379,302 ECL test access port with low power control
--------------------------------------------------------------------------------
5,381,061 Overvoltage tolerant output buffer circuit
--------------------------------------------------------------------------------
5,397,725 Method of controlling oxide thinning in an EPROM or flash memory
array
--------------------------------------------------------------------------------
5,408,147 VCC translator circuit
--------------------------------------------------------------------------------
5,412,238 Source coupling, split-gate, virtual ground flash EEPROM array
--------------------------------------------------------------------------------
5,418,474 Circuit for reducing transient simultaneous conduction
--------------------------------------------------------------------------------
5,449,633 Method for fabricating an ultra-high-density alternate metal
virtual ground ROM
--------------------------------------------------------------------------------
5,455,732 Buffer protection against output-node voltage excursions
--------------------------------------------------------------------------------
5,463,332 Multiple differential input ecl or/nor-gate
--------------------------------------------------------------------------------
5,482,819 Photolithographic process for reducing repeated defects
--------------------------------------------------------------------------------
5,489,861 High power, edge controlled output buffer
--------------------------------------------------------------------------------
5,497,475 Configurable integrated circuit having true and shadow EPROM
registers
--------------------------------------------------------------------------------
5,508,642 Series gated emitter coupled logic circuit providing closely spaced
output voltages
--------------------------------------------------------------------------------
5,517,459 Memory with multiple erase modes
--------------------------------------------------------------------------------
5,521,789 BiCMOS electrostatic discharge protection circuit
--------------------------------------------------------------------------------
5,576,988 Secure Non volatile memory array
--------------------------------------------------------------------------------
NS3222 Serial Input automatic block skipping feature
--------------------------------------------------------------------------------
NS3345 Reset Stretcher
--------------------------------------------------------------------------------
NS3435 Automated Dynamic Threshold
--------------------------------------------------------------------------------
NS3436 Overvoltage tolerant CMOS transfer gate
--------------------------------------------------------------------------------
NS3477 EEPROM programming voltage switch for two arrays on a single die
--------------------------------------------------------------------------------
NS3514 A field coupled gate BUS architecture using trench
--------------------------------------------------------------------------------
Total 151
--------------------------------------------------------------------------------
EXHIBIT 1.5
ASSIGNED TRADEMARKS
REP513G XXXXXXX AND H L.L.P. DRAFT
REPORT DATE EP-96 TRADEMARK PROPER___________ NATIONAL SEMICONDUCTOR CORPORATION
APPLN # REG # AFFID DATE
FILE NUMBER TRADEMARK COUNTRY FILE DATE REG DATE REN DATE CLASS GOODS DESCRIPTION COMMENTS
------------------------------------------------------------------------------------------------------------------------
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]
------------------------------------------------------------------------------------------------------------------------
EXHIBIT 1.13
CO-OWNED MASKWORKS
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Exhibit 1.15 (partial)
Historical, Obsoleted Discrete Product/Families
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
EXHIBIT 1.18
NATIONAL'S KNOWLEDGE
Xxxxxx XxxXxxx
Xxxx X. Xxxxx, III
Xxxxxxx X. Xxxxxxx
Xxx Xxxxxxxx
Xxxx Xxxxx
EXHIBIT 1.19
LICENSED PATENTS
Patents to be licensed by NSC to Xxxxxxxxx
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE
SECURITIES AND EXCHANGE COMMISSION]
EXHIBIT 1.20
HISTORICALLY UTILIZED PROCESSES
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Licensed Processes
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Exhibit 1.20
Historical, inactive processes
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Exhibit 1.23 (partial)
Historical, Logic Products/Families
ID Family
-- ------
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Exhibit 1.24 (partial)
Historical, Obsoleted Memory Products/Families
Products
--------
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
Exhibit 2.1(a)
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
EXHIBIT 6.2(f)
CROSS-LICENSE AGREEMENTS
[CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND
EXCHANGE COMMISSION]
