PRODUCT SUPPLY AGREEMENT
EXHIBIT 10.112
CONFIDENTIAL TREATMENT:
MICRON TECHNOLOGY, INC. HAS REQUESTED THAT THE OMITTED PORTIONS OF THIS DOCUMENT, WHICH ARE INDICATED BY ASTERISKS, BE AFFORDED CONFIDENTIAL TREATMENT PURSUANT TO RULE 24b-2 UNDER THE SECURITIES EXCHANGE ACT OF 1934. MICRON TECHNOLOGY, INC. HAS SEPARATELY FILED THE OMITTED PORTIONS OF THE DOCUMENT WITH THE SECURITIES AND EXCHANGE COMMISSION.
This Product Supply Agreement (this “Agreement”) is made and entered into as of this 6th day of April, 2012 (the “Effective Date”), by and between Intel Corporation, a Delaware corporation (“Intel”), Micron Semiconductor Asia Pte. Ltd., a Singapore corporation (“MSA”) and Micron Technology, Inc., a Delaware corporation (“MTI” and, together with MSA, collectively, “Micron”). Each of Intel, MSA and MTI may be referred to herein individually as a “Party” and collectively as the “Parties”.
RECITALS
A. Simultaneously with the execution of this Agreement, MTI and Intel are entering into the Designated Technology JDPA and other agreements that concern, in whole or in part, the development, manufacture, sale and use of products and technology resulting from the Designated Technology JDPA.
B. Intel desires to purchase Designated Technology Memory Wafers and Micron desires to supply such Designated Technology Memory Wafers upon the terms and subject to the conditions set forth in this Agreement.
AGREEMENT
NOW, THEREFORE, for good and valuable consideration, the receipt and sufficiency of which are hereby acknowledged, the Parties intending to be legally bound do hereby agree as follows.
ARTICLE 1
DEFINITIONS; CERTAIN INTERPRETIVE MATTERS
1.1 Definitions. In addition to the terms defined elsewhere in this Agreement, capitalized terms used in this Agreement shall have the respective meanings set forth in Exhibit A.
1.2 Certain Interpretive Matters.
(a) Terms. Unless the context requires otherwise, (i) all references to Sections, Articles, Recitals, Exhibits or Schedules are to Sections, Articles, Recitals, Exhibits or Schedules of or to this Agreement; (ii) each of the Schedules will apply only to the corresponding Section or subsection of this Agreement; (iii) words in the singular include the
- 1 -
101243746.4
plural and vice versa; (iv) the term “including” means “including without limitation”; and (v) the terms “herein,” “hereof,” “hereunder” and words of similar import shall mean references to this Agreement as a whole and not to any individual Section or portion hereof. All references to $ or dollar amounts will be to lawful currency of the United States of America. All references to “day” or “days” will mean calendar days and all references to “quarter(ly)”, “month(ly)” or “year(ly)” will mean Fiscal Quarter, Fiscal Month or Fiscal Year, respectively.
(b) No Interpretation Related to Drafting and Prior Drafts. No provision of this Agreement will be interpreted in favor of, or against, any of the Parties by reason of the extent to which any such Party or its counsel participated in the drafting thereof or by reason of the extent to which any such provision is inconsistent with any prior draft of this Agreement or such provision.
(c) Conversion of Designated Technology Devices. When a Party converts Designated Technology Devices into Designated Technology Memory Wafers under this Agreement, such conversion shall be calculated using a conversion factor methodology to be agreed between the parties that takes into account the real-time die yield at Probe Testing, the back-end die yield and any other factor that the Parties agree.
(d) Comparison of Output between Fiscal Months. When comparing output or projected output between a Fiscal Month that has four (4) weeks and a Fiscal Month that has five (5) weeks, the output or projected output during the Fiscal Month that has five (5) weeks will adjusted down for purposes of such comparison by multiplying the average weekly output or projected output for such Fiscal Month by four (4).
ARTICLE 2
GENERAL OBLIGATIONS
2.1 Supply and Purchase. Subject to the terms and conditions of this Agreement, Micron will supply to Intel, and Intel will purchase from Micron, **** Designated Technology Memory Wafers **** during the Term (the ****, “****”).
2.2 Traceability and Data Retention. Micron agrees to maintain, or cause its relevant affiliates to maintain, its production data relating to the Designated Technology Memory Wafers supplied hereunder for a minimum of **** years. At Intel's request, Micron will make available **** as well as **** for Designated Technology Memory Wafers supplied to Intel hereunder. The Parties will exchange mutually agreed Designated Technology Memory Wafer manufacturing data via electronic or other means as mutually agreed by the Parties. At Intel's request, Micron will also make available such data electronically to IMFT pursuant to the IMFT Services Agreement.
2.3 Control; Processes. Micron will, or will cause its relevant affiliates to, review with Intel any control and process mechanisms applicable to the manufacture of all Designated Technology Memory Wafers sold by Micron under this Agreement, including but not limited to such mechanisms that are utilized to meet or exceed the Specifications for the Designated Technology Memory Wafers. The Parties agree to work together in good faith to define mutually agreeable control and process mechanisms including the following: ****; provided, however,
- 2 -
101243746.4
that Micron will not be required to bear any expense relating to Intel's control and process mechanism requests that are in addition to those used by Micron or its relevant affiliates. Micron will promptly notify Intel or IMFT of ****.
2.4 Additional Customer Requirements. Intel will inform Micron in writing of any auditable supplier requirements of Intel's customers relating to any Facility at which Designated Technology Memory Wafers are manufactured. The Parties will work together in good faith to implement such requirements in a commercially reasonable manner.
2.5 **** Restrictions. Without the prior written approval of Intel or Intel's designee at IMFT, Micron shall not **** with respect to the Designated Technology Memory Wafers Micron supplies to Intel pursuant to this Agreement.
ARTICLE 3
FORECASTING; Performance reviews
3.1 Forecasting.
(a) Demand Forecast. Intel will provide Micron, either directly or via IMFT pursuant to the IMFT Services Agreement, each Fiscal Month during the Term beginning with the Fiscal Month in which Intel first delivers a demand forecast to IMFT under Section 3.1(a) of the IMFT Supply Agreement - Intel ****, with a written demand forecast (the “Demand Forecast”) covering the next **** Fiscal Months for Designated Technology Memory Wafers. Intel will base the Demand Forecast on Lehi Fab yield forecasts provided by IMFT and the JDP Committee. The Demand Forecast will include Intel's desired Designated Technology Memory Wafer breakout by design id, Process Technology Node, process revision and probe test revision. In addition, the Demand Forecast will include the level of Probe Testing, marking specification, requested delivery date and place of delivery for the Designated Technology Memory Wafers, which information will be updated by Intel on a weekly basis as necessary.
(b) Response to Forecast. Within a commercially reasonable period of time (or within a time period mutually agreed by the Parties from time-to-time) following Micron's actual, direct receipt of each Demand Forecast, Micron shall furnish Intel with a written response indicating what portion of the Demand Forecast that Micron will commit to supply (the “Response to Forecast”). The Response to Forecast will also set forth **** for each Fiscal Month of the period covered by the Demand Forecast.
(c) Binding Forecast Wafers. Upon delivery of a Response to Forecast, Micron will be obligated to supply to Intel the Designated Technology Memory Wafers (including **** Wafers) set forth in such Response to Forecast (the “Binding Forecast Wafers”), subject to (i) any **** Designated Technology Memory Wafers **** (provided **** is not prohibited by Sections 3.1(d) or 3.1(g)), (ii) any modifications to the design id mix of Designated Technology Memory Wafers requested by Intel as permitted by Section 3.1(d) and (iii) ****.
- 3 -
101243746.4
(d) Intel Committed Wafers. Upon delivery of a Response to Forecast, Intel will be obligated to purchase from Micron the Designated Technology Memory Wafers set forth in the **** Fiscal **** of such Response to Forecast (such Designated Technology Memory Wafers, “Intel Committed Wafers”); provided, however, that Intel may change the design id mix within any Process Technology Node in a Demand Forecast at any time until **** weeks prior to the scheduled loading of the wafers in question, and Micron's then-current Response to Forecast shall be deemed amended to reflect such changes.
(e) **** and **** Wafers.
(i) ****. A **** (a “****”) will exist if Micron elects to deliver a Response to Forecast that includes **** Wafers **** set forth in the **** Fiscal **** of the applicable Demand Forecast (any such Fiscal ****, a “ **** Period,” and the **** set forth in the Demand Forecast, **** Wafers for a particular **** Period, the “**** Wafers”).
(ii) **** Wafers; **** Designated Technology Memory Wafers. In each **** delivered after a **** exists (until a **** no longer exists during the **** period), Intel shall **** Wafers it ****, if any, for each **** Period. If Intel has **** Wafers in any **** Period, then the **** Micron may **** under this Agreement in the **** the **** Period will be ****. If Intel changes the **** that it **** for any **** Period, then the foregoing **** for any **** shall be ****. If any such change is **** for the **** Period, then **** shall be governed in a like manner to that described above for ****. If any such change is **** for the **** Period, the **** Wafers shall be ****.
(f) ****.
(i) ****. Notwithstanding anything in Section 3.1(a) to the contrary but subject to Section 3.1(f)(ii), Intel **** Designated Technology Memory Wafers for **** of each Demand Forecast that ****.
(ii) **** Month **** Commitment. Prior to the end of the Term, Intel may deliver a written notice to Micron stating that ****. If Intel delivers such a notice, then **** for **** Fiscal Months following the delivery of such notice and shall thereafter have no further force and effect, subject to the next following sentence. If after delivery of the notice described in this Section 3.1(f)(ii), (A) Intel elects to withdraw such notice and ****, (B) Intel requests **** in any Fiscal Month that **** Fiscal Months following the delivery of such notice or (C) a **** is required in any Fiscal Month **** Fiscal Months following the delivery of such notice, then Intel will **** as if such notice had not been delivered.
(iii) ****. If the **** Wafers in the **** Fiscal Month of a Response to Forecast is **** for such Fiscal Month (such ****, the “ **** Wafers”), Intel shall **** Micron (any such ****, a “****”) an ****.
(g) **** Wafers. If Intel makes a **** pursuant to Section 4.8(c), Intel shall ****, or, if the Term has ended, Intel may **** (similar in substance to a ****) that ****, a **** specifically identified Designated Technology Memory Wafers **** the **** that are **** Wafers in the then-existing Response to Forecast (such ****, the “ **** Wafers”). Micron will use commercially reasonable efforts to **** the **** Wafers that are related to a particular ****,
- 4 -
101243746.4
taking into consideration ****, but in any event **** Fiscal Months from the date on which Intel **** that first **** such **** Wafers. During such **** Fiscal Month period, until all **** Wafers for such **** Fiscal Month period ****, Micron will **** of Micron or a Subsidiary of Micron, or any ****, in each case to which Micron has **** (taking into account any ****) in a commercially reasonable manner Designated Technology Memory Wafers that **** Wafers. Until such time as Micron **** Wafers related to a particular ****, Intel and Micron will **** Wafers **** in each **** (including the **** Micron will **** such **** Wafers); provided, however, that Micron may **** for any **** Wafers subject to (i) Micron's obtaining Intel's consent ****, (ii) the **** Fiscal Month period limitation described above and (iii) the **** described above; provided further, that, if Intel does not consent to ****, Micron shall, with respect to the **** Wafers in question, ****. Intel shall not **** for any Fiscal Month that **** Wafers **** set forth in the then-existing Response to Forecast for such Fiscal Month.
(h) Variability. Micron will make commercially reasonable efforts to limit the **** variability of the quantity of Binding Forecast Wafers it supplies to no more than **** percent (****%) of the number of Binding Forecast Wafers for such week, and Micron will promptly notify Intel in writing of any inability to timely deliver the Binding Forecast Wafers on the schedule described in the Response to Forecast. If Micron does not make up any shortfall of Binding Forecast Wafers ****, the **** for the Binding Forecast Wafers that are **** in satisfaction of any shortfall remaining upon the conclusion of such **** shall be ****. Any extraordinary costs or fees incurred by Micron to hold excess inventory or make up any shortfall are at Micron's expense.
(i) Yield. Micron will make commercially reasonable efforts to deliver Designated Technology Memory Wafers under this Agreement that have a functional die yield, on a **** basis, of no less than **** percent (****%) below the **** functional die yield for the same product during the same **** at the Lehi Fab or, if such product is not manufactured at Lehi during such ****, at the Facility at which the Designated Technology Memory Wafers of such product were manufactured.
(j) Long Range Forecast. ****, in coordination with IMFT's **** business plan, Intel will provide Micron with a forecast for Designated Technology Memory Wafers for the lesser of **** or the remaining duration of the Term. Micron will provide feedback on those forecasts within a commercially reasonable period of time (or within a time period mutually agreed by the Parties from time-to-time) following IMFT's **** business plan review.
3.2 **** Reviews and Reports. Each **** during the Term, Micron shall provide Intel (and, at Intel's request, IMFT) with a **** report and meet with Intel (and, at Intel's request, IMFT) to discuss **** and the most recent **** report. The monthly report will include ****. At such meetings, the Parties shall define ****.
- 5 -
101243746.4
ARTICLE 4
PURCHASE ORDERS, INVOICING AND PAYMENTS
4.1 Placement of Purchase Orders. Prior to the commencement of every Fiscal Quarter, Intel shall place a purchase order in writing (via e-mail or facsimile transmission) for Designated Technology Memory Wafers to be supplied by Micron for the upcoming Fiscal Quarter during the Term (each such order, a “Purchase Order”), which Purchase Order shall request a quantity of Designated Technology Memory Wafers, for any Fiscal Month, that is no less than the Intel Committed Wafers for such Fiscal Month.
4.2 Content of Purchase Orders. Each Purchase Order shall specify the following items: (a) Purchase Order number; (b) description and part number of each different Designated Technology Memory Wafer; (c) forecasted quantity of each different design id; (d) forecasted unit Price and total forecasted Price for each different design id, and total forecasted Price for all Designated Technology Memory Wafers ordered; and (e) other terms (if any).
4.3 Acceptance of Purchase Order. If the quantity requested in a Purchase Order is equal to the quantity set forth in the current Response to Forecast for such upcoming Fiscal Quarter, Micron shall be deemed to accept such Purchase Order. If the quantity requested in such Purchase Order exceeds the quantity set forth in the current Response to Forecast for such upcoming Fiscal Quarter, Micron shall be deemed to accept a quantity under such Purchase Order that is equal to the quantity set forth in the current Response to Forecast and Micron may accept or reject any excess quantities in its sole discretion. If any Purchase Order contains any errors, Micron may accept or reject such Purchase Order, or any portions thereof, in its sole discretion.
4.4 Taxes. All transfer taxes (e.g., goods and services tax, value added tax, sales tax, service tax, business tax, etc.) imposed directly on or solely as a result of the sale, transfer or delivery of Designated Technology Memory Wafers and the payments therefor provided herein shall be stated separately on Micron's invoice, shall be the responsibility of and collected from Intel, and shall be remitted by Micron to the appropriate tax authority (“Recoverable Taxes”), unless Intel provides valid proof of tax exemption prior to the effective date of the transfer of the Designated Technology Memory Wafers or otherwise as permitted by law prior to the time Micron is required to pay such taxes to the appropriate tax authority. When property is delivered within jurisdictions in which collection and remittance of taxes by Micron is required by law, Micron shall have sole responsibility for remittance of said taxes to the appropriate tax authorities. In the event such taxes are Recoverable Taxes and Micron does not collect tax from Intel or remit such taxes to the appropriate Governmental Entity on a timely basis, and is subsequently audited by any tax authority, liability of Intel will be limited to the tax assessment for such Recoverable Taxes, with no reimbursement for penalty or interest charges or other amounts incurred in connection therewith. Notwithstanding anything herein to the contrary, taxes other than Recoverable Taxes shall not be reimbursed by Intel, and each Party is responsible for its own respective income taxes (including franchise and other taxes based on net income or a variation thereof), taxes based upon gross revenues or receipts, and taxes with respect to general overhead, including but not limited to business and occupation taxes, and such taxes shall not be Recoverable Taxes.
- 6 -
101243746.4
4.5 Invoicing; Payment. MTI or MSA will invoice Intel on a Fiscal Monthly basis for (a) the Price of the Designated Technology Memory Wafers delivered (and any Intel Committed Wafers that Intel fails to purchase) during the preceding Fiscal Month, and (b) the **** for the preceding Fiscal Month, if any. If any invoice includes the Price of Designated Technology Memory Wafers that constitute **** Wafers, the **** Wafers will be **** the Price of such **** Wafers. All amounts owed under this Agreement shall be stated, calculated and paid in United States Dollars. Except as otherwise specified in this Agreement, Intel shall pay the invoicing entity for the amounts due, owing, and duly invoiced under this Agreement within **** days following delivery of an invoice therefor to such place as the invoicing entity may reasonably direct therein.
4.6 Payment to Subcontractors. Micron shall be responsible for and shall hold Intel harmless for any and all payments to its vendors or subcontractors utilized in the performance of this Agreement.
4.7 **** Wafers.
(a) **** Wafers. Notwithstanding the **** of the aggregate **** associated with the **** Wafers, Micron may **** the **** Wafers in any manner Micron elects, in its sole and absolute discretion, including **** (the “**** Wafers”). In the ****, Micron will indicate whether it intends to **** Wafers, but shall not be bound by such indication ****. ****, Micron will **** Wafers at a Process Technology Node level to the extent required to comply with this Agreement.
(b) ****. If Micron ****, Micron will **** (the “****”) **** for such **** Wafers; provided, however, that the **** associated with such **** Wafers ****. With respect to the **** Wafers Micron manufactures, Micron will **** in the Fiscal Month that is **** Fiscal Months after the Probe Testing of **** Wafers and will **** within **** Business Days after ****. To the extent the **** cannot be **** in a particular Fiscal Month of Designated Technology Devices, then the ****.
(c) **** Other Products. If Micron **** that was **** the **** Wafers for ****, the Parties will work together to ****.
4.8 **** Reporting and True Up.
(a) Monthly Report. Within **** Business Days after the end of each Intel fiscal month during the Term (and the first Intel fiscal month following the Term if Micron delivers to Intel during such Intel fiscal month Designated Technology Memory Wafers (other than **** Wafers) under this Agreement), Intel shall deliver a report (the “**** Monthly Report”) that sets forth the following:
(i) ****;
(ii) ****;
(iii) ****;
- 7 -
101243746.4
(iv) ****;
(v) ****; and
(vi) ****.
(b) **** Wafer Adjustment. If a **** exists for an Intel fiscal month during which the **** related to any **** were ****, such **** shall be deemed to be **** Wafers **** in such Intel fiscal month for purposes of Section 4.8(a). In all cases other than that described in the immediately preceding sentence, the **** shall be deemed to be a “ ****.”
(c) Wafer ****. If a **** exists, then Intel shall **** (a “****”) ****. Intel will **** concurrently with Intel's delivery of the applicable **** Monthly Report. Following the Term, Intel may elect **** Wafers, in which case Micron will be entitled to ****.
(d) ****. If a **** exists at the end of any Fiscal Quarter, and the **** shown on the most recent **** Monthly Report is ****, then Intel shall **** within the **** Business Days after the end of such Fiscal Quarter; provided, however, that, if any **** or **** exists in the final **** Monthly Report to be delivered under this Agreement, then (i) if a **** exists, Intel shall **** and (ii) if a **** exists, Micron shall ****, in each case within **** Business Days after the date Intel delivers such **** Monthly Report.
4.9 Record Keeping.
(a) Micron. MTI will, and will cause its Affiliates to, maintain during the Term and for a period of not less than **** following the expiration or termination of this Agreement, in accordance with GAAP and in sufficient detail to enable an audit trail to be established, true and complete books and records of account relating to the calculation of **** and **** (collectively with the other related books and records of Micron maintained in the ordinary course of business, the “Micron Records”).
(b) Intel. Intel will, and will cause its Affiliates to, maintain during the Term and for a period of not less than **** following the expiration or termination of this Agreement, in accordance with GAAP and in sufficient detail to enable an audit trail to be established, true and complete books and records of account relating to ****, **** Wafers (if any), the **** Monthly Reports and the **** (collectively with the other related books and records of Intel maintained in the ordinary course of business, the “Intel Records”).
4.10 Financial Audit Rights.
(a) Micron Right. The Parties agree that, at any time during the Term and during the **** period immediately following the expiration or termination of this Agreement, Micron may cause any independent, certified public accounting firm selected and paid by Micron and reasonably acceptable to Intel (the “Micron Auditor”), upon not fewer than **** days prior written notice, during normal business hours and at the place Intel (or its Affiliate, as the case may be) regularly keeps the Intel Records, to inspect and audit the Intel Records for the purpose of verifying the compliance of Intel and any of its Affiliates with the terms of this Agreement; provided, however, that Micron may not inspect and audit the Intel Records of any Person
- 8 -
101243746.4
included within Intel more than **** in any **** period. Intel and each of its Affiliates will provide the Micron Auditor with reasonable access to Intel Records and information requested during an audit. Intel Records will be made available to the Micron Auditor under conditions of confidentiality, and it will report to Micron and to Intel whether the terms of this Agreement are being met, including whether ****. Any inspection or audit of the Intel Records under the terms of this Section will be at Micron's sole cost and expense; provided, however, that in the event any audit of the Intel Records discloses any ****, or any other material breach of the obligations of Intel or any of its Affiliates under this Agreement, Intel will reimburse Micron for all reasonable and actually incurred costs and expenses associated with such audit. Failure, including refusal, by Intel or any of its Affiliates to comply with the record keeping, mediation or audit provisions set forth in this Agreement will constitute a material breach of this Agreement by Intel and any such Affiliate and may result in termination of the Agreement by Micron, without prejudice to all other remedies available to Micron under the terms of this Agreement, including the right to monetary damages and to equitable relief.
(b) Intel Right. The Parties agree that, at any time during the Term and during the **** period immediately following the expiration or termination of this Agreement, Intel may cause any independent, certified public accounting firm selected and paid by Intel and reasonably acceptable to Micron (the “Intel Auditor”), upon not fewer than **** days prior written notice, during normal business hours and at the place Micron (or its Affiliate, as the case may be) regularly keeps the Micron Records, to inspect and audit the Micron Records for the purpose of verifying the compliance of Micron and any of its Affiliates with the terms of this Agreement; provided, however, that Intel may not inspect and audit the Micron Records of any Person included within Micron more than **** in any **** period. Micron and each of its Affiliates will provide the Intel Auditor with reasonable access to Micron Records and information requested during an audit. Micron Records will be made available to the Intel Auditor under conditions of confidentiality, and it will report to Intel and to Micron whether the terms of this Agreement are being met, including whether ****. Any inspection or audit of the Micron Records under the terms of this Section will be at Intel's sole cost and expense; provided, however, that in the event any audit of the Micron Records discloses any ****, or any other material breach of the obligations of Micron or any of its Affiliates under this Agreement, Micron will reimburse Intel for all reasonable and actually incurred costs and expenses associated with such audit. Failure, including refusal, by Micron or any of its Affiliates to comply with the record keeping, mediation or audit provisions set forth in this Agreement will constitute a material breach of this Agreement by Micron and any such Affiliate and may result in termination of the Agreement by Intel, without prejudice to all other remedies available to Intel under the terms of this Agreement, including the right to monetary damages and to equitable relief.
ARTICLE 5
TITLE, RISK OF LOSS AND SHIPMENT
5.1 Title and Risk of Loss. Intel shall take title to, and assume risk of loss with respect to, the Designated Technology Memory Wafers that are exported from the country of manufacturing using the term **** and for Designated Technology Memory Wafers that are not exported from the country of manufacturing using the term ****, in each case pursuant to ****.
- 9 -
101243746.4
5.2 Packaging. All packaging of the Designated Technology Memory Wafers shall be in conformance with the Specifications, Intel's reasonable instructions, and general industry standards, and shall be reasonably resistant to damage that may occur during transportation. Marking on the packages shall be made by Micron in accordance with Intel's reasonable instructions.
5.3 Shipment. Intel shall provide shipping instructions to Micron, shall bear all shipping costs, and shall directly pay all shipping carriers. All Designated Technology Memory Wafers shall be prepared for shipment in a manner that: (a) follows good commercial practice; (b) is acceptable to common carriers for shipment at the lowest rate; and (c) is adequate to ensure safe arrival. If and to the extent directed by Intel, Micron will xxxx all containers with necessary lifting, handling, and shipping information, Purchase Order number, date of shipment, and the names of Intel and applicable customer. At Intel's request, Micron will provide drop-shipment of Designated Technology Memory Wafers to Intel's customers. Shipment may be provided by a subcontractor to Micron.
5.4 Customs Clearance. Upon Intel's request, Micron will promptly provide Intel with a statement of origin for all Designated Technology Memory Wafers and with applicable customs documentation for Designated Technology Memory Wafers wholly or partially manufactured outside of the country of import.
ARTICLE 6
WARRANTY; HAZARDOUS MATERIALS; DISCLAIMER
6.1 Warranty. Micron makes the following warranties regarding the Designated Technology Memory Wafers furnished hereunder, which warranties shall survive any delivery, inspection, acceptance, payment, or resale of the Designated Technology Memory Wafers:
(a) the Designated Technology Memory Wafers will conform to all agreed Specifications;
(b) the Designated Technology Memory Wafers are free from defects in materials or workmanship; and
(c) Micron has the necessary right, title, and interest to provide the Designated Technology Memory Wafers to Intel and the Designated Technology Memory Wafers will be free of liens and encumbrances affecting title, not including any warranty of non-infringement.
6.2 Warranty Claims. Within a period of time, not to exceed the lesser of the actual warranty period applicable to the end customer for the Designated Technology Memory Wafer at issue or **** from the date of the delivery of the Designated Technology Memory Wafers at issue to Intel (the “Warranty Notice Period”), Intel shall notify Micron if it believes that any Designated Technology Memory Wafer does not meet the warranty set forth in Section 6.1. Intel shall return such Designated Technology Memory Wafers (or Designated Technology Devices manufactured from Designated Technology Memory Wafers, as the case may be) to Micron as directed by Micron. If a Designated Technology Memory Wafer is determined not to be in
- 10 -
101243746.4
compliance with such warranty, then Intel shall be entitled to return such Designated Technology Memory Wafer and cause Micron to replace at Micron's expense or, at Intel's option, receive a credit or refund of any monies paid to Micron in respect of such Designated Technology Memory Wafer. Such credit or refund shall in no event exceed on a per-unit basis the final price paid for the Probed Wafer under this Agreement, and shall not include any transfer taxes paid in respect of the Probed Wafer. The basis for such refund or credit shall be ****. THE FOREGOING REMEDY IS INTEL'S SOLE AND EXCLUSIVE REMEDY FOR MICRON'S FAILURE TO MEET ANY WARRANTY OF SECTION 6.1.
6.3 Hazardous Materials.
(a) If Designated Technology Memory Wafers provided hereunder include Hazardous Materials as determined in accordance with applicable law, Micron represents and warrants that Micron and Micron's employees, agents, and subcontractors actually working with such materials in providing the Designated Technology Memory Wafers hereunder to Intel shall be trained in accordance with applicable law regarding the nature of and hazards associated with the handling, transportation, and use of such Hazardous Materials, as applicable to Micron.
(b) To the extent required by applicable law, Micron shall provide Intel with Material Safety Data Sheets (MSDS) either prior to or accompanying any delivery of Designated Technology Memory Wafers to Intel.
6.4 Disclaimer. EXCEPT AS OTHERWISE EXPRESSLY PROVIDED IN THIS ARTICLE 6, MICRON HEREBY EXPRESSLY DISCLAIMS ALL REPRESENTATIONS AND WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, SUITABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE, NON-INFRINGEMENT OR OTHERWISE, WITH RESPECT TO THE Designated Technology MEMORY WAFERS PROVIDED UNDER THIS AGREEMENT. THE WARRANTIES WILL NOT APPLY TO: (i) ANY WARRANTY CLAIM OR ISSUE, OR DEFECT TO THE EXTENT CAUSED BY TECHNICAL MATERIALS PROVIDED OR SPECIFIED BY, THROUGH OR ON BEHALF OF INTEL, INCLUDING BUT NOT LIMITED TO PRODUCT DESIGNS, TECHNOLOGY AND TEST PROGRAMS; OR (ii) ANY OF THE Designated Technology MEMORY WAFERS THAT HAVE BEEN REPAIRED OR ALTERED, EXCEPT AS AUTHORIZED BY MICRON, OR WHICH ARE SUBJECTED TO MISUSE, NEGLIGENCE, ACCIDENT OR ABUSE.
ARTICLE 7
CONFIDENTIALITY
All information provided, disclosed or obtained in the performance of any of the Parties' activities under this Agreement shall be subject to all applicable provisions of the Confidentiality Agreement. Furthermore, the terms and conditions of this Agreement shall be considered “Confidential Information” under the Confidentiality Agreement for which each Party is considered a “Receiving Party” under such agreement. To the extent there is a conflict between this Agreement and the Confidentiality Agreement, the terms of this Agreement shall control.
- 11 -
101243746.4
ARTICLE 8
INDEMNIFICATION
8.1 Mutual General Indemnity. Subject to Article 9, each Indemnifying Party shall indemnify, defend and hold harmless each Indemnified Party from and against any and all Indemnified Losses based on or attributable to any Third Party Claim or threatened Third Party Claim arising under this Agreement and as a result of the negligence, gross negligence or willful misconduct of the Indemnifying Party or any of its respective officers, directors, employees, agents or subcontractors. Notwithstanding the foregoing, this Section 8.1 shall not apply to any claims or losses based on or attributable to intellectual property infringement.
8.2 Indemnification Procedures.
(a) General Procedures. Promptly after the receipt by any Indemnified Party of a notice of any Third Party Claim that an Indemnified Party seeks to be indemnified under this Agreement, such Indemnified Party shall give written notice of such Third Party Claim to the Indemnifying Party, stating in reasonable detail the nature and basis of each allegation made in the Third Party Claim and the amount of potential Indemnified Losses with respect to each allegation, to the extent known, along with copies of the relevant documents received by the Indemnified Party evidencing the Third Party Claim and the basis for indemnification sought. Failure of the Indemnified Party to give such notice shall not relieve the Indemnifying Party from liability on account of this indemnification, except if and only to the extent that the Indemnifying Party is actually prejudiced by such failure or delay. Thereafter, the Indemnified Party shall deliver to the Indemnifying Party, promptly after the Indemnified Party's receipt thereof, copies of all notices and documents (including court papers) received by the Indemnified Party relating to the Third Party Claim. The Indemnifying Party shall have the right to assume the defense of the Indemnified Party with respect to such Third Party Claim upon written notice to the Indemnified Party delivered within thirty (30) days after receipt of the particular notice from the Indemnified Party. So long as the Indemnifying Party has assumed the defense of the Third Party Claim in accordance herewith and notified the Indemnified Party in writing thereof, (i) the Indemnified Party may retain separate co-counsel at its sole cost and expense and participate in the defense of the Third Party Claim, it being understood that the Indemnifying Party shall pay all reasonable costs and expenses of counsel for the Indemnified Party after such time as the Indemnified Party has notified the Indemnifying Party of such Third Party Claim and prior to such time as the Indemnifying Party has notified the Indemnified Party that it has assumed the defense of such Third Party Claim; (ii) the Indemnified Party shall not file any papers or, other than in connection with a settlement of the Third Party Claim, consent to the entry of any judgment without the prior written consent of the Indemnifying Party (not to be unreasonably withheld, conditioned or delayed); and (iii) the Indemnifying Party will not consent to the entry of any judgment or enter into any settlement with respect to the Third Party Claim (other than a judgment or settlement that is solely for money damages and is accompanied by a release of all indemnifiable claims against the Indemnified Party) without the prior written consent of the Indemnified Party (not to be unreasonably withheld, conditioned or delayed). Whether or not the Indemnifying Party shall have assumed the defense of the Indemnified Party for a Third Party Claim, such Indemnifying Party shall not be obligated to indemnify and hold harmless the Indemnified Party hereunder for any consent to the entry of judgment or settlement
- 12 -
101243746.4
entered into with respect to such Third Party Claim without the Indemnifying Party's prior written consent, which consent shall not be unreasonably withheld, conditioned or delayed.
(b) Equitable Remedies. In the case of any Third Party Claim where the Indemnifying Party reasonably believes that it would be appropriate to settle such Third Party Claim using equitable remedies, the Indemnifying Party and the Indemnified Party shall work together in good faith to agree to a settlement; provided, however, that no Party shall be under any obligation to agree to any such settlement.
(c) Treatment of Indemnification Payments; Insurance Recoveries. Any indemnity payment under this Agreement shall be decreased by any amounts actually recovered by the Indemnified Party under third party insurance policies with respect to such Indemnified Losses (net of any premiums paid by such Indemnified Party under the relevant insurance policy), each Party agreeing (i) to use all reasonable efforts to recover all available insurance proceeds and (ii) to the extent that any indemnity payment under this Agreement has been paid by the Indemnifying Party to the Indemnified Party prior to the recovery by the Indemnified Party of such insurance proceeds, the amount of such insurance proceeds actually recovered by the Indemnified Party shall be promptly paid to the Indemnifying Party.
(d) Certain Additional Procedures. The Indemnified Party shall cooperate and assist the Indemnifying Party in determining the validity of any Third Party Claim for indemnity by the Indemnified Party and in otherwise resolving such matters. The Indemnified Party shall cooperate in the defense by the Indemnifying Party of each Third Party Claim (and the Indemnified Party and the Indemnifying Party agree with respect to all such Third Party Claim that a common interest privilege agreement exists between them), including (i) permitting the Indemnifying Party to discuss the Third Party Claim with such officers, employees, consultants and representatives of the Indemnified Party as the Indemnifying Party reasonably requests; (ii) providing to the Indemnifying Party copies of documents and samples of products as the Indemnifying Party reasonably requests in connection with defending such Third Party Claim; (iii) preserving all properties, books, records, papers, documents, plans, drawings, electronic mail and databases relating to pertinent matters under the Indemnified Party's custody or control in accordance with such Party's corporate documents retention policies, or longer to the extent reasonably requested by the Indemnifying Party; (iv) notifying the Indemnifying Party promptly of receipt by the Indemnified Party of any subpoena or other third party request for documents or interviews and testimony; (v) providing to the Indemnifying Party copies of any documents produced by the Indemnified Party in response to or compliance with any subpoena or other third party request for documents; and (vi) except to the extent inconsistent with the Indemnified Party's obligations under applicable law and except to the extent that to do so would subject the Indemnified Party or its employees, agents or representatives to criminal or civil sanctions, unless ordered by a court to do otherwise, not producing documents to a third party until the Indemnifying Party has been provided a reasonable opportunity to review, copy and assert privileges covering such documents.
- 13 -
101243746.4
ARTICLE 9
LIMITATION OF LIABILITY
9.1 Damages Limitation. SUBJECT TO SECTION 9.4, IN NO EVENT SHALL EITHER PARTY BE LIABLE TO THE OTHER PARTY FOR ANY SPECIAL, CONSEQUENTIAL, INCIDENTAL OR OTHER INDIRECT DAMAGES OR ANY PUNITIVE OR EXEMPLARY DAMAGES ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT, WHETHER SUCH DAMAGES ARE BASED ON BREACH OF CONTRACT, TORT (INCLUDING NEGLIGENCE) OR OTHER THEORY OF LIABILITY, AND EVEN IF A PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
9.2 Remedy. THE PARTIES AGREE THAT TO THE EXTENT A CLAIM ARISES UNDER THIS AGREEMENT, THE CLAIM SHALL BE BROUGHT UNDER THIS AGREEMENT.
9.3 Damages Cap. SUBJECT TO SECTION 9.4, IF EITHER PARTY SHALL BE LIABLE TO THE OTHER PARTY FOR ANY MATTER ARISING FROM THIS AGREEMENT, WHETHER BASED UPON AN ACTION OR CLAIM IN CONTRACT, WARRANTY, EQUITY, NEGLIGENCE, INTENDED CONDUCT OR OTHERWISE (INCLUDING ANY ACTION OR CLAIM ARISING FROM AN ACT OR OMISSION, NEGLIGENT OR OTHERWISE, OF THE LIABLE PARTY), THE AMOUNT OF DAMAGES RECOVERABLE AGAINST THE LIABLE PARTY WITH RESPECT TO ANY BREACH, PERFORMANCE, NONPERFORMANCE, ACT OR OMISSION HEREUNDER WILL NOT EXCEED THE LESSER OF THE ACTUAL DAMAGES ALLOWED HEREUNDER OR TEN MILLION DOLLARS ($10,000,000).
9.4 Exclusions and Mitigation. Section 9.1 and 9.3 will not apply to either Party's breach of Article 7. Section 9.3 will not apply to Intel's or Micron's failure to meet a payment obligation which is due and payable under this Agreement. Each Party shall have a duty to use commercially reasonable efforts to mitigate damages for which the other Party is responsible.
9.5 Losses. Except as provided under Section 8.1, Micron and Intel each shall be responsible for Losses to their respective tangible personal or real property (whether owned or leased), and each Party agrees to look only to their own insurance arrangements with respect to such damages. Micron and Intel waive all rights to recover against each other, including each Party's insurers' subrogation rights, if any, for any loss or damage to their respective tangible personal property or real property (whether owned or leased) from any cause covered by insurance maintained by each of them, including their respective deductibles or self-insured retentions. Notwithstanding the foregoing, in the event of a loss hereunder involving a property, transit or crime event or occurrence that: (a) is insured under Intel's insurance policies; (b) a single insurance deductible applies; and (c) the loss event or occurrence affects the insured ownership or insured legal interests of the Parties, then the Parties shall share the cost of the deductible in proportion to each Party's insured ownership or legal interests in relative proportion to the total insured ownership or legal interests of the Parties.
- 14 -
101243746.4
ARTICLE 10
TERM AND TERMINATION
10.1 Term. The term of this Agreement commences on the Effective Date and continues in effect until the earlier of (a) the seven (7) year anniversary of the PRQ Date, (b) the six (6) month anniversary of the Comparable Trigger Date, (c) the six (6) month anniversary of the date on which a Party receives a notice of termination of this Agreement pursuant to Section 10.2 (other than Section 10.2(a), 10.2(b) or 10.2(c)), (d) the date on which a Party receives a notice of termination of this Agreement pursuant to Section 10.2(b) or 10.2(c), or (e) the date on which a Party receives a notice of termination of this Agreement pursuant to Section 10.2(a), or at the non-breaching Party's election, the six (6) month anniversary of such date, which election will be set forth in the notice (such period of time, the “Term”).
10.2 Termination. This Agreement may be terminated by:
(a) Intel by written notice to Micron upon a material breach of this Agreement by Micron or by Micron by written notice to Intel upon a material breach of this Agreement by Intel, in each case if such breach remains ninety (90) days following notice by the non-breaching Party; provided, however, that such cure period shall be thirty (30) days if the material breach is a failure to pay monies due under this Agreement;
(b) Intel by written notice to MTI within ninety (90) days after the Escalation Process End Date (as defined in the MALA) if Intel is permitted to terminate this Agreement pursuant to Section 2.6(D)(1) of the MALA;
(c) MTI by written notice to Intel within ninety (90) days after the Escalation Process End Date (as defined in the MALA) if MTI is permitted to terminate this Agreement pursuant to Section 2.6(D)(2) of the MALA;
(d) either Party by written notice to the other Party within ninety (90) days after the occurrence of a termination of the Designated Technology JDPA pursuant to Sections 10.2(g) or 10.2(h) of the Designated Technology JDPA;
(e) Intel by written notice to Micron within ninety (90) days after the occurrence of a termination of the Designated Technology JDPA pursuant to Section 10.2(e) of the Designated Technology JDPA;
(f) Intel by written notice to Micron within ninety (90) days after the occurrence of a termination of the Designated Technology JDPA pursuant to Section 10.2(d)(i) of the Designated Technology JDPA; and
(g) Micron by written notice to Intel within ninety (90) days after the occurrence of a termination of the Designated Technology JDPA pursuant to Section 10.2(d)(ii) of the Designated Technology JDPA.
10.3 Survival. Termination of this Agreement shall not affect any of the Parties' respective rights accrued or obligations owed before termination, including any rights or
- 15 -
101243746.4
obligations of the Parties in respect of any accepted Purchase Orders existing at the time of termination. In addition, the following shall survive termination of this Agreement for any reason: Sections 2.2, 3.1(g), 6.2 and 6.4 and Articles 4, 7, 8, 9, 10 and 11.
ARTICLE 11
MISCELLANEOUS
11.1 Force Majeure Events. The Parties shall be excused from any failure to perform any obligation hereunder to the extent such failure is caused by a Force Majeure Event. A Force Majeure Event shall operate to excuse a failure to perform an obligation hereunder only for the period of time during which the Force Majeure Event renders performance impossible or infeasible and only if the Party asserting Force Majeure as an excuse for its failure to perform has provided written notice to the other Party specifying the obligation to be excused and describing the events or conditions constituting the Force Majeure Event. As used herein, “Force Majeure Event” means the occurrence of an event or circumstance beyond the reasonable control of the party failing to perform, including (a) explosions, fires, flood, earthquakes, catastrophic weather conditions, or other elements of nature or acts of God; (b) acts of war (declared or undeclared), acts of terrorism, insurrection, riots, civil disorders, rebellion or sabotage; (c) acts of federal, state, local or foreign governmental authorities or courts; (d) labor disputes, lockouts, strikes or other industrial action, whether direct or indirect and whether lawful or unlawful; (e) failures or fluctuations in electrical power or telecommunications service or equipment; and (f) delays caused by the other Party's nonperformance hereunder.
11.2 Specific Performance. The Parties agree that irreparable damage will result if this Agreement is not performed in accordance with its terms, and the Parties agree that any damages available at law for a breach of this Agreement would not be an adequate remedy. Therefore, the provisions hereof and the obligations of the Parties hereunder shall be enforceable in a court of equity, or other tribunal with jurisdiction, by a decree of specific performance, and appropriate preliminary or permanent injunctive relief may be applied for and granted in connection therewith. Such remedies and all other remedies provided for in this Agreement shall, however, be cumulative and not exclusive and shall be in addition to any other remedies that a Party may have under this Agreement.
11.3 Assignment. This Agreement shall be binding upon and inure to the benefit of the permitted successors and assigns of each Party hereto. Neither this Agreement nor any right or obligation hereunder may be assigned or delegated by either Party in whole or in part to any other Person, other than a wholly-owned Subsidiary of a Party, without the prior written consent of the non-assigning Parties. Any purported assignment in violation of the provisions of this Section shall be null and void and have no effect. No assignment or delegation by any Party will relieve or release the delegating Party from any of its liabilities and obligations under this Agreement.
11.4 Compliance with Laws and Regulations. Each of the Parties shall comply with, and shall use reasonable efforts to require that its respective subcontractors comply with, Applicable Laws relating to this Agreement and the performance of a Party's rights hereunder.
- 16 -
101243746.4
11.5 Notice. All notices and other communications hereunder shall be in writing and shall be deemed given upon (a) transmitter's confirmation of a receipt of a facsimile transmission; (b) confirmed delivery by a standard overnight carrier or when delivered by hand; (c) the expiration of five (5) Business Days after the day when mailed in the United States by certified or registered mail, postage prepaid; or (d) delivery in Person, addressed at the following addresses (or at such other address for a party as shall be specified by like notice):
In the case of Micron:
Micron Technology, Inc.
****
****
Attention: ****
Facsimile Number: ****
In the case of Intel:
Intel Corporation
****
****
Attention: ****
Facsimile Number: ****
Either Party may change its address for notices upon giving ten (10) days written notice of such change to the other Party in the manner provided above.
11.6 Waiver. The failure at any time of a Party to require performance by the other Party of any responsibility or obligation required by this Agreement shall in no way affect a Party's right to require such performance at any time thereafter, nor shall the waiver by a Party of a breach of any provision of this Agreement by the other Party constitute a waiver of any other breach of the same or any other provision nor constitute a waiver of the responsibility or obligation itself.
11.7 Severability. Should any provision of this Agreement be deemed in contradiction with the laws of any jurisdiction in which it is to be performed or unenforceable for any reason, such provision shall be deemed null and void, but this Agreement shall remain in full force in all other respects. Should any provision of this Agreement be or become ineffective because of changes in Applicable Laws or interpretations thereof, or should this Agreement fail to include a provision that is required as a matter of law, the validity of the other provisions of this Agreement shall not be affected thereby. If such circumstances arise, the Parties hereto shall negotiate in good faith appropriate modifications to this Agreement to reflect those changes that are required by Applicable Law.
11.8 Third Party Rights. Nothing in this Agreement, whether express or implied, is intended or shall be construed to confer, directly or indirectly, upon or give to any Person, other than the Parties hereto, any legal or equitable right, remedy or claim under or in respect of this Agreement or any covenant, condition or other provision contained herein.
- 17 -
101243746.4
11.9 Amendment. This Agreement may not be modified or amended except by a written instrument executed by or on behalf of each of the Parties to this Agreement.
11.10 Entire Agreement. This Agreement and the applicable provisions of the Confidentiality Agreement, which are incorporated herein and made a part hereof, together with the Exhibits and Schedules hereto and the agreements and instruments expressly provided for herein, constitute the entire agreement of the Parties hereto with respect to the subject matter hereof and supersede all prior agreements and understandings, oral and written, between the Parties hereto with respect to the subject matter hereof.
11.11 Choice of Law. This Agreement shall be construed and enforced in accordance with and governed by the laws of the State of Delaware, without giving effect to the principles of conflict of laws thereof.
11.12 Jurisdiction; Venue. Any suit, action or proceeding seeking to enforce any provision of, or based on any matter arising out of or in connection with, this Agreement shall be brought in a state or federal court located in Delaware and each of the Parties to this Agreement hereby consents and submits to the exclusive jurisdiction of such courts (and of the appropriate appellate courts therefrom) in any such suit, action or proceeding and irrevocably waives, to the fullest extent permitted by Applicable Law, any objection which it may now or hereafter have to the laying of the venue of any such suit, action or proceeding in any such court or that any such suit, action or proceeding which is brought in any such court has been brought in an inconvenient forum. Process in any such suit, action or proceeding may be served on any party anywhere in the world, whether within or without the jurisdiction of any such court.
11.13 Headings. The headings of the Articles and Sections in this Agreement are provided for convenience of reference only and shall not be deemed to constitute a part hereof.
11.14 Counterparts. This Agreement may be executed in several counterparts, each of which shall be deemed an original, but all of which together shall constitute one and the same instrument.
11.15 Insurance. Without limiting or qualifying Micron's liabilities, obligations, or indemnities otherwise assumed by Micron pursuant to this Agreement, Micron shall maintain, at no charge to Intel, with companies acceptable to Intel: Commercial General Liability insurance with limits of liability not less than **** Dollars ($****) per occurrence and including liability coverage for bodily injury or property damage ****. Micron's insurance shall be primary with respect to liabilities assumed by Micron in this Agreement to the extent such liabilities are the subject of Micron's insurance, and any applicable insurance maintained by Intel shall be excess and non-contributing. The above coverage shall name Intel as additional insured as respects Micron's work or services provided to or on behalf of Intel.
[Signature page follows]
- 18 -
101243746.4
IN WITNESS WHEREOF, this Agreement has been duly executed by and on behalf of the Parties hereto as of the Effective Date.
INTEL CORPORATION | MICRON SEMICONDUCTOR ASIA PTE. LTD. | ||
By: | /s/ Xxxxx Xxxxxxxx | By: | /s/ Xxxxx X. Xxxxxxx |
Xxxxx Xxxxxxxx Senior Vice President, Chief Operating Officer | Xxxxx X. Xxxxxxx Senior Managing Director and Chairman | ||
MICRON TECHNOLOGY, INC. | |||
By: | /s/ D. Xxxx Xxxxxx | ||
D. Xxxx Xxxxxx Chief Executive Officer | |||
THIS IS THE SIGNATURE PAGE FOR THE
PRODUCT SUPPLY AGREEMENT BY AND AMONG
INTEL CORPORATION, MICRON SEMICONDUCTOR ASIA PTE. LTD.
AND MICRON TECHNOLOGY, INC.
EXHIBIT A
DEFINITIONS
“**** Wafers” means, with respect to a ****, the ****, which **** shall be **** if Intel's **** is **** any subsequent **** by a ****.
“Agreement” shall have the meaning set forth in the preamble to this Agreement.
“Applicable Law” means any applicable laws, statutes, rules, regulations, ordinances, orders, codes, arbitration awards, judgments, decrees or other legal requirements of any Governmental Entity.
“****” means, with respect to **** Wafers, the aggregate **** by Micron on the Designated Technology Devices contained on such **** Wafers **** such Designated Technology Devices were the Designated Technology Devices that **** in the Fiscal Month that is **** Fiscal Months following the Fiscal Month in which such **** Wafers were Probe Tested.
“Binding Forecast Wafers” shall have the meaning set forth in Section 3.1(c).
“Business Day” means a day that is not a Saturday, Sunday or other day on which commercial banking institutions in the State of New York are authorized or required by Applicable Law to be closed.
“****” means a ****.
“****” means a ****.
“Comparable Trigger Date” shall have the meaning set forth in the Designated Technology JDPA.
“Confidentiality Agreement” means that certain Second Amended and Restated Mutual Confidentiality Agreement, dated as of the Effective Date, by and among Intel, MTI, Micron Semiconductor Asia Pte Ltd., Intel Technology Asia Pte. Ltd., IMFT, and IM Flash Singapore, LLP, as amended.
“**** Designated Technology Device” means a Designated Technology Device that ****.
“**** Monthly Report” shall have the meaning set forth in Section 4.8(a).
“**** Product” means ****. For clarity, “ **** Product” includes any ****. Notwithstanding the foregoing, **** Product will not be construed to cover ****.
“****” shall have the meaning set forth in Section 2.1.
“Demand Forecast” shall have the meaning set forth in Section 3.1(a).
“Designated Technology Device” shall have the meaning set forth in the Designated Technology Joint Development Program Agreement for so long as that agreement is in effect
- 20 -
101243746.4
and, following termination of such agreement, “Designated Technology Device” shall thereafter have the meaning as it existed on the last day of the term of such agreement.
“Designated Technology JDPA” means that Designated Technology Joint Development Program Agreement, dated as of February 27, 2012, by and between Intel and MTI, as amended.
“Designated Technology Memory Wafer” means a Prime Wafer that has been processed to the point of containing multiple Designated Technology Devices and that has undergone Probe Testing, but before singulation of said die into individual semiconductor die.
“Effective Date” shall have the meaning set forth in the preamble to this Agreement.
“Excursion” means an occurrence during production that is outside normal historical behavior as established by the Parties in writing in the applicable Specifications which may impact performance, quality, reliability or delivery commitments hereunder for Designated Technology Memory Wafers.
“Facility” means any facility at which Designated Technology Memory Wafers are manufactured for the purposes of this Agreement.
“Fiscal Month” means any of the twelve financial accounting months within Micron's Fiscal Year.
“Fiscal Quarter” means any of the four financial accounting quarters within Micron's Fiscal Year.
“Fiscal Year” means the fiscal year of Micron for financial accounting purposes.
“****” means, with respect to a particular Fiscal Month, the difference of (i) the **** for Designated Technology Memory Wafers Probe Tested in such Fiscal Month, minus (ii) **** for Designated Technology Memory Wafers Probe Tested in such Fiscal Month. The Parties will work together to ensure that **** under this Agreement are not also **** (as defined in such agreements).
“****” shall have the meaning set forth in Section 3.1(f)(iii).
“****” means, with respect to a particular Fiscal Month, a number of Designated Technology Memory Wafers equal to the **** Wafers for such Fiscal Month ****.
“****” shall have the meaning set forth in Section 4.8(a)(iii).
“Force Majeure Event” shall have the meaning set forth in Section 11.1.
“**** Wafers” shall have the meaning set forth in Section 3.1(f)(iii).
“**** Wafers” means, for a particular Fiscal Month in which there are **** Wafers, the ****.
- 21 -
101243746.4
“****” means, for a particular Fiscal Month, (i) if such Fiscal Month has four (4) weeks, **** Designated Technology Memory Wafers and (ii) if such Fiscal Month has five (5) weeks **** Designated Technology Memory Wafers.
“GAAP” means United States generally accepted accounting principles as in effect from time to time.
“Governmental Entity” means any governmental authority or entity, including any agency, board, bureau, commission, court, municipality, department, subdivision or instrumentality thereof, or any arbitrator or arbitration panel.
“Hazardous Materials” means dangerous goods, chemicals, contaminants, substances, pollutants or any other materials that are defined as hazardous by relevant local, state, national, or international law, regulations and standards.
“IMFT” means IM Flash Technologies LLC, a Delaware limited liability company.
“IMFT Services Agreement” means that certain Services Agreement among IMFT, Intel and MTI dated as of September 18, 2009, as amended, including by that certain First Amendment to Services Agreement (IMFT Services to Intel) among IMFT, Intel and MTI dated as of the Effective Date.
“IMFT Supply Agreement - Intel” means that certain Amended and Restated Supply Agreement between IMFT and Intel dated as of the Effective Date, as amended.
“IMFT Supply Agreement - Micron” means that certain Amended and Restated Supply Agreement between IMFT and MTI dated as of the Effective Date, as amended.
“IMFT Supply Agreements” means the IMFT Supply Agreement - Intel and the IMFT Supply Agreement - Micron.
“Indemnified Losses” means all direct, out-of-pocket liabilities, damages, losses, costs and expenses of any nature incurred by an Indemnified Party, including reasonable attorneys' fees and consultants' fees, and all damages, fines, penalties and judgments awarded or entered against an Indemnified Party, but specifically excluding any special, consequential or other types of indirect damages.
“Indemnified Party” means any of the following to the extent entitled to seek indemnification under this Agreement: Intel, Micron, and their respective affiliates, officers, directors, employees, agents, assigns and successors.
“Indemnifying Party” means the Party owing a duty of indemnification to an Indemnified Party with respect to a particular Third Party Claim.
“Intel” shall have the meaning set forth in the preamble to this Agreement.
“Intel Auditor” shall have the meaning set forth in Section 4.10(b).
- 22 -
101243746.4
“Intel Committed Wafers” shall have the meaning set forth in Section 3.1(d).
“Intel Records” shall have the meaning set forth in Section 4.9(b).
“JDP Committee” means that JDP Committee as defined in the Designated Technology JDPA.
“Lehi Fab” shall have the meaning ascribed to it in the Operating Agreement.
“Losses” means, collectively, any and all insurable liabilities, damages, losses, costs and expenses (including reasonable attorneys' and consultants' fees and expenses).
“**** Wafers” shall have the meaning set forth in Section 3.1(g).
“MALA” means the ****.
“****” means, for a particular Fiscal Month, an amount equal to the difference of (i) the aggregate **** for all **** Wafers that were Probe Tested **** Fiscal Months prior to such Fiscal Month, minus (ii) the aggregate **** for all **** Wafers sold in such Fiscal Month.
“****” shall have the meaning set forth in Section 4.7(b).
“**** Wafers” shall have the meaning set forth in Section 4.7(a).
“Micron” shall have the meaning set forth in the preamble to this Agreement.
“Micron Auditor” shall have the meaning set forth in Section 4.10(a).
“Micron Records” shall have the meaning set forth in Section 4.9(a).
“****” means a number of Designated Technology Memory Wafers equal to the product of (i) ****, multiplied by (ii) the difference of (a) **** percent (****%), minus (b) the product of (I) **** percent (****%), multiplied by (II) Q, where “Q” equals **** depending on when the **** falls as described in the following chart:
If the **** occurs in one of the following **** Fiscal **** periods of the then-existing ****: | then Q equals: |
Fiscal **** through ****: | **** |
Fiscal **** through ****: | **** |
Fiscal **** through ****: | **** |
Fiscal **** through ****: | **** |
- 23 -
101243746.4
“****” means, with respect to **** Wafers, an amount equal to the sum of (i) the aggregate **** for the ****, plus (ii) the aggregate **** with the Designated Technology Devices contained on such **** Wafers ****.
“Modified GAAP” means GAAP, except that: (i) stock-related expenses (including stock options, restricted stock, stock appreciation rights, restricted stock units, stock purchase programs or any award based on equity of MTI or Intel) associated with the seconded individuals to IMFT will not be recorded or disclosed in the financial statements of IMFT; and (ii) the value of any asset contributed or otherwise transferred to IMFT from MTI or Intel shall be the value as agreed upon by MTI and Intel at the time of the contribution or transfer, as applicable, and, if such asset is to be depreciated or amortized under GAAP, the useful life and method of depreciation or amortization for such assets shall be determined by applying the accounting policies used by IMFT for like assets. The value of the Lehi Property (as defined in the Operating Agreement) shall be Two Hundred Twenty Million ($220,000,000).
“MSA” shall have the meaning set forth in the preamble to this Agreement.
“MTI” shall have the meaning set forth in the preamble to this Agreement.
“****” means a device whose primary purpose is to ****. The **** is compliant with **** and does not perform ****.
“****” shall have the meaning set forth in Section 4.8(a)(vi).
“****” shall have the meaning set forth in Section 4.8(a)(vi).
“Operating Agreement” means that Second Amended and Restated Limited Liability Company Operating Agreement of IM Flash Technologies, LLC, dated as of the Effective Date, between Intel and MTI, as amended.
“Party” shall have the meaning set forth in the preamble to this Agreement.
“****” means, at any particular time, the **** of Designated Technology Memory Wafers included in ****.
“****” means, with respect to a particular ****, the Fiscal Month in which such **** exists; provided, however, that, if the **** exists in **** Fiscal Month ****, the **** Fiscal Month in which such **** exists in **** will be the ****.
“Person” means any natural person and any corporation, firm, partnership, trust, estate, limited liability company, or other entity resulting from any form of association.
“Price” means the calculation referenced on Schedule 4.5.
“Prime Wafer” means the raw silicon wafers required, on a product-by-product basis, for the manufacturer.
- 24 -
101243746.4
“Probe Testing” means testing, using a wafer test program as set forth in the applicable Specifications, of a wafer that has completed all processing steps deemed necessary to complete the creation of the desired Designated Technology Devices in the die on such wafer, the purpose of which test is to determine how many and which of the die meet the applicable criteria for such die set forth in the Specifications.
“Process Technology Node” means a process with a known feature size or number of tiers or decks that is differentiated from another or others that have a different feature size or number of tiers or decks that yields at least a **** percent (****%) difference in **** relative to each other. For clarity, a difference in the number of **** shall not be considered a different process node for purposes of this definition of “Process Technology Node.”
“PRQ Date” means the earlier of (i) “PRQ Date” as specified in a statement of work last adopted by the JDP Committee or (ii) December 31, 2014.
“Purchase Order” shall have the meaning set forth in Section 4.1.
“Recoverable Taxes” shall have the meaning set forth in Section 4.4.
“****” means, with respect to a Designated Technology Memory Wafer with a particular design id, the **** such Designated Technology Memory Wafer, ****. The **** shall be those relating to the **** so long as the design id in question **** during the applicable Fiscal **** (whether or not the Probed Wafers supplied hereunder during such Fiscal **** were ****). If the design id in question **** during the applicable Fiscal ****, then the various **** shall be those relating to the **** (or was ****, as the case may be) in question. Notwithstanding anything herein to the contrary, in the event Intel **** in any Fiscal **** pursuant to ****, then the **** for such Fiscal **** shall exclude any **** that may have otherwise resulted from the ****.
“Response to Forecast” shall have the meaning set forth in Section 3.1(b).
“Specifications” means those specifications used to describe, characterize, and define the yield, quality and performance of the Designated Technology Memory Wafers, including any interim performance specifications at Probe Testing, as such specifications may be agreed from time to time by the Parties; provided, however, that (i) if a design id is being manufactured in the Lehi Fab, the Specifications for each design id shall be the same as the specifications for such design id applicable to Intel pursuant to the IMFT Supply Agreement - Intel; and (ii) if a design id is not being manufactured in the Lehi Fab, the Specifications for that design id shall be as established by the JDP Committee.
“Subsidiary” means as to any Person, a corporation, partnership, limited liability company or other entity of which shares of stock or other ownership interests having ordinary voting power (other than stock or such other ownership interests having such power only by reason of the happening of a contingency) to elect a majority of the board of directors or other managers of such corporation, partnership or other entity are at the time owned, or the management of which is otherwise controlled, directly or indirectly through one or more intermediaries, or both, by such Person.
- 25 -
101243746.4
“****” shall have the meaning set forth in Section 3.1(e)(i).
“****” shall have the meaning set forth in Section 3.1(e)(i).
“****” shall have the meaning set forth in Section 3.1(e)(i).
“****” shall have the meaning set forth in Section 4.8(b).
“Term” shall have the meaning set forth in Section 10.1.
“Third Party Claim” means any claim, demand, action, suit or proceeding, and any actual or threatened lawsuit, complaint, cross-complaint or counter-complaint, arbitration or other legal or arbitral proceeding of any nature, brought in any court, tribunal or judicial forum anywhere in the world, regardless of the manner in which such proceeding is captioned or styled, by any Person other than Intel, Micron and affiliates of the foregoing, against an Indemnified Party, in each case alleging entitlement to any Indemnified Losses pursuant to any indemnification obligation under this Agreement.
“****” means, with respect to Designated Technology Memory Wafers of a particular designs id, the **** for such Designated Technology Memory Wafers, **** (i) if such Designated Technology Memory Wafers **** or (i) if such Designated Technology Memory Wafers ****, and, in each case, assuming ****.
“****” means, with respect to Designated Technology Memory Wafers of a particular designs id, the aggregate **** a Designated Technology Memory Wafer (****).
“****” shall have the meaning set forth in Section 4.8(c).
“Warranty Notice Period” shall have the meaning set forth in Section 6.2.
- 26 -
101243746.4
SCHEDULE 4.5
PRICE
****
- 27 -
101243746.4
