Optional MOD_SELn Timing Requirements. The addition of the MOD_SELn input pin to CFP8 requires a new timing specification, not covered by reference [4]. A timing diagram is shown in Figure 2-4. The timing parameters are listed in Table 2-4. Host MOD_SELn Setup Time t_MOD_SELn_setup 100 - ms Before the rising edge of MDC clock cycle for the first preamble bit. Host MOD_SELn Hold Time t_MOD_SELn_hold 1 - ms After the falling edge of MDC clock cycle for the last ADDRESS/DATA bit.
Optional MOD_SELn Timing Requirements. The addition of the MOD_SELn input pin to CFP8 requires a new timing specification, not covered by reference [4]. A timing diagram is shown in Figure 2-4. The timing parameters are listed in Table 2-4. Host MOD_SELn Setup Time t_MOD_SELn_setup 100 - ms Before the rising edge of MDC clock cycle for the first preamble bit. Host MOD_SELn Hold Time t_MOD_SELn_hold 1 - ms After the falling edge of MDC clock cycle for the last ADDRESS/DATA bit. The CFP8 module utilizes MDIO IEEE Std. 802.3TM-2015 clause 45 [6] for its management interface. The CFP8 MDIO implementation is defined in a separate document entitled, “CFP MSA Management Interface Specification” [4]. Because CFP8 has the MOD_SELn pin instead of PRTADR pins, the following describes the CFP8 addressing and startup requirements.
