Common use of Hardware Control Pins Clause in Contracts

Hardware Control Pins. ‌ The CFP4 Module supports real-time control functions via hardware pins, listed in Table 1-1. Specifications of the CFP4 hardware control pins are given in Ref.[1], with the following changes listed below. Table 1-1: Control Pins‌ Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 11 TX_DIS (PRG_CNTL) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull – Up3 14 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up3 16 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down4 1 When Programmable Control is configured, MSA Default is TXDIS. 2 Per CFP MSA Management Interface Specification [3] when PRG_CNTL is configured for this pin.

Hardware Control Pins. ‌ The CFP4 CFP8 Module supports real-time control functions via hardware pins, listed in Table 12-1. Specifications of the CFP4 CFP8 hardware control pins are given in Ref.[1Ref. [1], with the following changes listed below. Table 12-1: Hardware Control Pins‌ Pins Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 11 96 TX_DIS (PRG_CNTLPRG_CNTL1) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull – Up3 14 94 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up3 16 88 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down4 1 When Programmable Control is configured, MSA Default is TXDISTX_DIS. 2 Per CFP MSA Management Interface Specification [34] when PRG_CNTL PRG_CNTL1 is configured for this pin.

Hardware Control Pins. ‌ The CFP4 Module supports real-time control functions via hardware pins, listed in Table 1-1. Specifications of the CFP4 hardware control pins are given in Ref.[1], with the following changes listed below. Table 1-1: Control Pins‌ Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 11 TX_DIS (PRG_CNTL) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull – Up3 14 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up3 16 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down4 1 When Programmable Control is configured, MSA Default is TXDIS. 2 Per CFP MSA Management Interface Specification [3] when PRG_CNTL is configured for this pin.Down4

Hardware Control Pins. ‌ 9 The CFP4 CFP8 Module supports real-time control functions via hardware pins, listed in Table 12-1. 10 Specifications of the CFP4 CFP8 hardware control pins are given in Ref.[1Ref. [1], with the following changes listed below. 11 Table 1-2- 1: Hardw are Control Pins‌ Pins Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 11 96 TX_DIS (PRG_CNTLPRG_CNTL1) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull – Up3 14 94 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up3 16 88 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down4 1 When Programmable Control is configured, MSA Default is TXDIS. 2 Per CFP MSA Management Interface Specification [3] when PRG_CNTL is configured for this pin.Down4