NoC Pattern Sample Clauses

NoC Pattern. Pattern ID: Pattern Name: PNoC Related pattern: Type: Context: PAT –PNoC – 00 N/A SW Mixed-criticality networks supports communication between the subsystems and elements of the systems. In domains such as avionics, railway, automotive, industrial control and medical systems, where functions of different criticality are integrated on a single embedded distributed computing platform, mixed-criticality networks are used for communication purposes. Protection mechanisms are a prerequisite for the integration of subsystems and elements with different criticality, thus avoiding interferences in spatial and the temporal domains. Furthermore, the communication among subsystems, elements and functionalities with different criticality level usually leads to issues related to interferences. For instance, a non-safety communication may cause interferences on safety-related communication. Problem: A mixed-criticality system can integrate functionalities with different criticality levels which may require communicating. Furthermore, the integration of functionalities with different criticality level can lead to issue interferences in general. For example, a non-safety subsystem can lead to a failure in a safety related subsystem. Different NoCs are suitable for safety-critical applications, providing support of TT, RC or BE traffic. The shift towards the use of NoC communication subsystems for mixed-criticality systems leads to recurrent challenges related to supporting of multiple types of communication as well as supporting applications with different criticality level. For instance, TTNoC networks do not support the transmission of event-triggered messages, whereas AEtheral NoC does not support the transmission of RC messages. Solution under consideration: Partition 3 Non-Safety Partition 2 Non-Safety Partition 1 Safety This pattern aims to manage the prioritization of different criticality subsystem communication that performs scheduling, routing, traffic shaping and error detection. Figure 37 shows the integration of this pattern on a multi-core device, where it is located on top of a NoC. Hypervisor Processor Core 0 Processor Core 1 Local On-Chip Memory PNoC Network Interface Figure 37: PNoC integration in a partitioned mixed-critical device. (Source [44]) In accordance with the IEC 61508 safety standard, this pattern can be taken as a SCL network which is implemented on top of a black channel network. Therefore, it is assumed that parts of the communication chan...
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Related to NoC Pattern

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