Test Block Diagram Sample Clauses

Test Block Diagram. Power supply Host system Data TX/RX Current probe Optical module Oscilloscope 9.2.1 I2CMCI Read/Write/Test‌ Figure 9-1 Management interface test The host system asserts MODSel and uses the following operations to access the optical module through I2CMCI at a 0–400 kHz (1 MHz if supported) SCL clock speed. The clock stretch duration is 500 µs, and the results should be obtained successfully. In addition to 100K and 400K, other typical speeds such as 20K, 50K, and 200K should be used to confirm I2CMCI robustness. a Read one byte from the current byte address. b Read n > 1 bytes sequentially, starting at the current byte address. c Read one byte from a given byte address. d Read n > 1 bytes sequentially, starting at a given byte address. e Write one byte to a given address. f Write n > 1 bytes sequentially, starting at a given byte address. g Test if target is ready to accept transaction (ACK polling). 1. The optical module maintains the internal address counter to roll-over in lower memory and sets the current byte address to 0 when the address to be incremented is 127. To roll-over in upper memory, the optical module sets the current byte address to 128 when the address to be incremented is 255. 2. These tests should be performed in both low-power mode and high-power mode.
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