Watchdog Timeout Failure Sample Clauses

Watchdog Timeout Failure. The RTU platform shall have a watchdog circuit comprising a re-triggerable hardware timer with direct access to the hardware reset line of the CPU (such that if the watchdog timer is timed out, the CPU will automatically be reset and start into its boot sequence). Any CPU reset caused by a watchdog timeout shall be registered, so as to enable the booting CPU to determine that a watchdog timeout has just occurred. Any application software running on the CPU shall periodically reset the watchdog timer. In the event the RTU software crashes due to an unusual event (perhaps a power glitch), the watchdog should timeout and fire (typically within a fraction of a second), causing the RTU to reboot and hence automatically recover. The RTU kernel shall reset watchdog at a predetermined interval and will register the occurrence of any watchdog timeout. On rebooting after a reset, the RTU shall set an internal status bit to indicate that it has undergone a reset due to a watchdog timeout.
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Related to Watchdog Timeout Failure

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