ARM Compliant Core definition

ARM Compliant Core means [***] (i) [***] (ii) [***] (iii) [***] (iv) [***] (v) [***] (vi) [***] (vii) [***] (viii) [***] (ix) [***] (x) [***].
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ARM Compliant Core means the ARM[***] microprocessor core as described and identified in the Technical Reference Manual and which; (i) executes each and every instruction in the ARM Instruction Set; (ii) executes no additional instructions to those contained in the ARM Instruction Set; (iii) exhibits the Architecture; (iv) exhibits the Pipeline Length; (v) is Single Issue; (vi) executes all instructions at an identical rate of cycles per instruction (“CPI”) to that specified in the Technical Reference Manual; (vii) implements the programmer’s model as identified in the Architecture Documentation listed in Section 1 Part A; (viii) runs and passes the Functional Test Vectors; (ix) runs and passes the AVS; and (x) has been verified in accordance with the provisions of Section 3 of this Annex 1.
Sample 1
ARM Compliant Core means the ARM*** microprocessor core as described and identified in the Technical Reference Manual and which; (i) executes each and every instruction in the ARM Instruction Set; (ii) executes no additional instructions to those contained in the ARM Instruction Set; (iii) exhibits the Architecture; (iv) exhibits the Pipeline Length; (v) is Single Issue; (vi) executes all instructions at an identical rate of cycles per instruction (“CPI”) to that specified in the Technical Reference Manual; (vii) implements the programmer’s model as identified in the “Architecture Reference Manual” (Published by Xxxxxxx-Xxxxxx); (viii) runs and passes the Functional Test Vectors; (ix) runs and passes the AVS; and (x) has been verified in accordance with the provisions of Section 3 of this Annex 1.
Sample 1

Examples of ARM Compliant Core in a sentence

  • A.5 For each ARM Compliant Product incorporating an Implementation of the ARM Compliant Core, LICENSEE shall keep a copy of the Equivalence Log Results for such ARM Compliant Product and shall deliver, as soon as reasonably possible, copies of such records to ARM upon request from ARM.

  • D.1 No right is granted to LICENSEE to distribute or commercially exploit the Test Chips, or any technology contained therein (excluding the ARM Compliant Core) without obtaining a separate licence from ARM.

  • If ARM concludes that the Implementation of the ARM Compliant Core has not been validated and verified in accordance with the provisions of Clause V.A.4, then ARM shall indicate to LICENSEE the errors which ARM has detected and LICENSEE shall repeat the process prescribed in Clauses V.A.1- V.A.3.

  • If ARM reasonably concludes that the Implementation of the ARM Compliant Core has not been verified in accordance with the provisions of Clause V.A.4, then ARM shall indicate to LICENSEE the errors which ARM has detected and LICENSEE shall repeat the process prescribed in Clauses V.A.1- V.A.4.

  • In the juxtaposition of bureaucratization and imaginative, Burke had something very specific in mind and it is one of the central ideas of Attitudes toward History.

  • For each ARM Compliant Product incorporating an Implementation of the ARM Compliant Core, LICENSEE shall keep a copy of the Equivalence Log Results for such ARM Compliant Product and shall deliver, as soon as reasonably possible, copies of such records to ARM upon request from ARM.

  • E.1 No right is granted to LICENSEE to distribute or commercially exploit the Test Chips, or any technology contained therein (excluding the ARM Compliant Core) without obtaining a separate licence from ARM.

  • If ARM concludes that the Implementation of the ARM Compliant Core has not been validated and verified in accordance with the provisions of Clause V.A.4, then ARM shall indicate to LICENSEE the errors which ARM has detected and LICENSEE shall repeat the process prescribed in Clauses V.A.1-V.A.3.


More Definitions of ARM Compliant Core

ARM Compliant Core means the Cortex-A7 MPCore subsystem as described and identified in the Technical Reference Manual and which; (i) contains up to a maximum of four (4) integer CPUs, each of which; (a) executes each and every instruction in the ARM Instruction Set; (b) executes no additional instructions to those contained in the ARM Instruction Set; (c) executes all instructions at an identical rate of cycles per instruction (“CPI”) to that specified in the Technical Reference Manual; (d) exhibits the Architecture; (e) exhibits the Pipeline Length; and (f) is Single Issue; (ii) implements the programmer’s model as identified in the Technical Reference Manual; (iii) runs and passes the Functional Test Vectors; (iv) implements the snoop control unit which controls data cache coherence in the manner described in the Technical Reference Manual; and (v) has been verified in accordance with the provisions of Section 3 of this Annex 1.
Sample 1
ARM Compliant Core means (1) with respect to the Cortex-A5MP Core, subsystem as described and identified in the Technical Reference Manual in Section 1.1 of this Annex 1 and which; (i) contains up to a maximum of four (4) integer CPUs, each of which; (a) executes each and every instruction in the ARM Instruction Set; (b) executes no additional instructions to those contained in the ARM Instruction Set; (c) executes all instructions at an identical rate of cycles per instruction (“CPI”) to that specified in the Technical Reference Manual; (d) exhibits the Architecture; (e) exhibits the Pipeline Length; and (f) is Single Issue; (ii) implements the programmer’s model as identified in the Technical Reference Manual; (iii) runs and passes the Functional and Integration Test; (iv) implements the snoop control unit which controls data cache coherence in the manner described in the Technical Reference Manual;
Sample 1

Related to ARM Compliant Core

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