Host Controller Driver Internal Definitions Sample Clauses

Host Controller Driver Internal Definitions. The following definitions describe information internal to the Host Controller Driver and the Universal Serial Bus Driver; they are samples only and not representations of what must be present within the Host Controller Driver. No attempt is made to be complete; sufficient information is supplied only to give a background for the code samples in later sections. // // USBD Request // typedef struct _USBD_REQUEST { PCHAR Buffer; ULONG BufferLength; ULONG XferInfo; ULONG MaxIntDelay; BOOLEAN ShortXferOk; UCHAR Setup[8]; ULONG Status; LIST_ENTRY HcdList; } USBD_REQUEST, *PUSBD_REQUEST; Table 5-5: USBD_REQUEST Field Description Buffer Pointer to data to be transferred BufferLength Length of data buffer in bytes XferInfo Direction (In/Out) for control and bulk MaxIntDelay Maximum allowable delay from completion to completion notification to USBD ShortXferOk Transfer of less than BufferLength is to be treated as an error unless this is TRUE Setup Data for setup packet (control endpoints only) Status Completion status from HCD to USBD HcdList List of all HCD_TRANSFER_DESCRIPTORs in use for this request // // Each Host Controller Endpoint Descriptor is also doubly linked into a list tracked by HCD. // Each ED queue is managed via an HCD_ED_LIST // typedef struct _HCD_ED_LIST { LIST_ENTRY Head; PULONG PhysicalHead; USHORT Bandwidth; UCHAR Next; UCHAR Reserved; } HCD_ED_LIST, *PHCD_ED_LIST; Table 5-6: HCD_ED_LIST Field Description Head Head of an HCD_ENDPOINT_DESCRIPTOR list PhysicalHead Address of location to put the physical head pointer when it changes Bandwidth Allocated bandwidth on this timeslice. Bandwidth is allocated on a per HCD_ENDPOINT basis, so this value may exceed the bandwidth scheduled in the ED list. Next Index to the next HCD_ED_LIST for this timeslice // // The different ED lists are as follows. // #define ED_INTERRUPT_1ms 0 #define ED_INTERRUPT_2ms 1 #define ED_INTERRUPT_4ms 3 #define ED_INTERRUPT_8ms 7 #define ED_INTERRUPT_16ms 15 #define ED_INTERRUPT_32ms 31 #define ED_CONTROL 63 #define ED_BULK 64 #define ED_ISOCHRONOUS 0 // same as 1ms interrupt queue #define NO_ED_LISTS 65 #define ED_EOF 0xff // // HCD Device Data // typedef struct _HCD_DEVICE_DATA { PHC_OPERATIONAL_REGISTER HC; PHCCA_BLOCK HCCA; LIST_ENTRY Endpoints; LIST_ENTRY FreeED; LIST_ENTRY FreeTD; LIST_ENTRY StalledEDReclamation; LIST_ENTRY RunningEDReclamation; LIST_ENTRY PausedEDRestart; HCD_ED_LIST EdList[NO_ED_LIST]; ULONG FrameHighPart; ULONG AvailableBandwidth; ULONG MaxBandwid...
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