NAND Flash Memory Product definition

NAND Flash Memory Product means any NAND Flash Memory Wafer, NAND Flash Memory Die or NAND Flash Memory Die Package.
NAND Flash Memory Product means a non-volatile semiconductor memory device containing memory cells that are electrically programmable and electrically erasable whereby the memory cells consist of one or more transistors that have a floating gate, charge trapping regions or any other functionally equivalent structure utilizing one or more different charge levels (including binary or multi-level cell structures), with or without any on-chip control, I/O and other support circuitry, in wafer, die or packaged form.
NAND Flash Memory Product shall have the meaning set forth in the LLC Operating Agreement.

Examples of NAND Flash Memory Product in a sentence

  • The actual monthly NAND Flash Memory Product lot output from the Y5 Facility shall be allocated between Toshiba and SanDisk, as applicable, based on the Y5 NAND Capacity Ratio.

  • For the avoidance of doubt, nothing contained in the foregoing shall restrict the Parties from engaging in any other activities, including, without limitation, (i) designing any NAND Flash Memory Product or R/W; (ii) selling any NAND Flash Memory Product or R/W to any customer; (iii) entering into any equipment purchase or material supply agreements; or (iv) entering into any patent licensing arrangement.

  • The Parties acknowledge that they intend to expand their Y4 NAND Flash Memory Product manufacturing capacity through development of the Y4 Facility according to volumes and timing set forth in Schedule 6.5(b) (including to [*]L/M, the “Ramp-Up Plan”).

  • Toshiba shall be allocated NAND Flash Memory Product capacity of [***] L/M and SanDisk shall be allocated NAND Flash Memory Product capacity of [***] L/M at the Yokkaichi Facility (not including the FVC-Japan Equipment).

  • For the purpose of the foregoing, the “main function and value” of any product shall be considered to be flash memory if (x) the total NAND flash memory array area is greater than [***] of the total die area or (y) the product is a cut-down or derivative of a standard NAND Flash Memory Product.

  • The Parties acknowledge that they intend to expand their Y3 NAND Flash Memory Product manufacturing capacity through development of the Y3 Facility according to volumes and timing set forth in Schedule 6.3(b) (including to [***] L/M, the "Ramp-Up Plan").

  • As soon as practicable after the Closing and with the intent to facilitate [***] L/M .16u NAND Flash Memory Product output capacity for FVC-Japan, the Parties will cause FVC-Japan to purchase (i) certain tools to replace the tools sold to third parties pursuant to Section 3.03(b)(iii) (the "Replacement Tools") and (ii) certain tools required in addition to the Replacement Tools to enable FVC-Japan to attain [***] L/M output capacity for the .16u NAND Flash Memory Product (the "Additional Capacity Tools").

  • The Parties acknowledge that they intend to expand their Y4 NAND Flash Memory Product manufacturing capacity through development of the Y4 Facility according to volumes and timing set forth in Schedule 6.5(b) (including to [***] L/M, the “Ramp-Up Plan”).

  • E- commerce easily got accepted by users because of latest developments on internet and internet enabled devices such as mobile phone, computers, and tablet computers.

  • Within a period of time, [***] for the NAND Flash Memory Product produced from the Probed Wafers at issue [***] of the Probed Wafers at issue to the Joint Venture Company (“Warranty Notice Period”), the Joint Venture Company shall notify Micron if it believes that any Probed Wafers do not meet the Probed Wafers warranty set forth in Section 6.2. The Joint Venture Company shall return such Probed Wafers to Micron as directed by the Joint Venture Company.


More Definitions of NAND Flash Memory Product

NAND Flash Memory Product means a product that includes NAND Flash Memory Integrated Circuits.
NAND Flash Memory Product means a NAND Flash Memory Integrated Circuit, in die, wafer, or packaged form, that utilizes (i) electrically programmable and electrically erasable utilizing floating gate to substrate Fxxxxx-Xxxxxxxx charge transfer mechanism for both programming and erase operations; (ii) electrically programmable and electrically erasable utilizing floating gate to substrate Fxxxxx-Xxxxxxxx charge transfer mechanism for programming and hot-hole injection for erase operations; or (iii) memory cells arranged in groups of serially connect memory cells (each such group of serially connect memory cells called a “string”) in which the drain of each memory cell of a string (other than the first memory cell in the string) is connected in series to the source of another memory cell in such string, the gate of each memory cell in such string is directly accessible, and the drain of the uppermost bit of such string is coupled to the bitline of the memory array.
NAND Flash Memory Product shall have the meaning set forth in the IMFS Agreement.
NAND Flash Memory Product means any NAND Flash Memory Wafer, NAND Flash Memory Die or NAND Flash Memory Die Package. “NAND Flash Memory Wafer” means a prime wafer that has been processed to the point of containing multiple NAND Flash Memory Die and that
NAND Flash Memory Product shall have the meaning set forth in the Operating Agreement. “[***] Budget” shall have the meaning set forth in the Operating Agreement. “[***] Group” shall have the meaning set forth in Section 4.13(F) of this Agreement.
NAND Flash Memory Product means a NAND Flash Memory Integrated Circuit, in die, wafer, or packaged form, that utilizes (i) electrically programmable and electrically erasable utilizing floating gate to substrate Fowler-Nordheim charge transfer mechanism for both programming and erase operations; (ii) electrically programmable and electrically erasable utilizing floating gate to substrate Fowler-Nordheim charge transfer mechanism for programming and hot-hole injection for erase operations; or (iii) memory cells arranged in groups of serially connect memory cells (each such group of serially connect memory cells called a “string”) in which the drain of each memory cell of a string (other than the first memory cell in the string) is connected in series to the source of another memory cell in such string, the gate of each memory cell in such string is directly accessible, and the drain of the uppermost bit of such string is coupled to the bitline of the memory array.

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