Verification of GPGPU Programs Sample Clauses

Verification of GPGPU Programs. We now categorize the formal verification efforts attempted to date according to the verifi- cation technique adopted. The relevant techniques are: pairwise verification of threads and symbolic execution. For completeness, and because Task 6.4 of CARP is on the integration of static verification with dynamic instrumentation, we also discuss recent dynamic verification approaches. Pairwise Verification of Threads. Pairwise verification of threads has as its starting point the observation that any data race in a GPGPU program will be due to two threads accessing the same memory location without proper synchronization, where at least one of the threads performs a write. The observation was first made by Li and Gopalakrishnan and their co-workers [88]. As they report, considering threads in a pairwise fashion allows them to scale to programs that were beyond the capabilities of their previous bounded model checking approach [89] (see below). Pairwise verification has been adopted by Li and Xxxxxxxxxxxxxx [00, 94] and by Xxxxxxxx et al. [119], and is the basis of current work on GPU kernel verification by the CARP team at Imperial College London. Besides considering threads in a pairwise fashion, another crucial observation made by these approaches is that in the case of data races it suffices to consider program executions between barriers, which are the main means of synchronization in GPGPU programming. This considerably reduces the complexity the logical formulas that need to be checked, allowing for the verification of more complex programs. The work of Xxxxxxxx et al. [119] only considers data races and is limited to verifying absence of races only in programs where all loops have fixed bounds. They, however, claim to be working on an extension of their method which mitigates the loop bound limitation. The work of Li and Gopalakrishnan [88], implemented in their tool PUG, is more advanced and allows for verification of programs with unknown loop bounds, using techniques for automatic loop invariant inference. Their technique also allows loop invariants to be specified manually for cases where inference fails. The technique exploits the fact that CUDA kernels cannot exhibit recursion, and inlines all procedure calls. This means that discovery of procedure pre- and post-conditions is not necessary. Although the technique is necessarily incomplete, Li and Gopalakrishnan claim that the technique can be highly successful in the case of GPGPU programs, as most ...
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