VDM-RT in the UTP Sample Clauses

VDM-RT in the UTP. ‌ Real-time, concurrency, and rich-state modelling have already been given substantial study in the UTP, specifically within the context of the Circus language family [35]. Circus is a formal modelling language that combines the constructs of the CSP language [20] for modelling of concurrent systems with rich-state modelling as provided by the Z specification language [45]. Circus thus provides semantically equivalent constructs to those in VDM-SL for modelling operations and state, together with the ability to represent concurrent stateful systems. Process state variables in Circus are not shared by concurrent processes, and so information can be conveyed from process to process only through CSP-style communication channels. As we also mentioned in Section 2.3 the basis of Circus is the reactive design, that allows the expression of reactive specifications with assumptions and commitments. € The CircusTime language [40] is an extension of Circus that introduces discrete real-time modelling constructs such as timeouts and deadlines. Additionally, the COMPASS modelling language [44] (CML) is a more recent development that provides similar modelling constructs, but in the context of a new semantic model that has an improved treatment of time in the presence of operators like external choice [6]. All of these languages are based on an extension of reactive designs called timed reactive designs [18, 42]. A timed reactive design, is defined in terms of a healthiness condition RT that subsumes R from reactive designs, and also ensures that measurement of time is well-behaved. A timed reactive design is then written as RT (P Q), for timed assumption P and commitment Q. The addition of timing information here allows the expression of constraints like timing budgets, and could therefore we used to give an account to implicit operations in VDM-RT. Also of interest here are languages like Timed CSP [36] and Hybrid CSP [19] that provide sup- port for continuous time modelling (and in the case of the latter, system dynamics). Although VDM-RT is discrete time, other notations such as Modelica [32] are continuous time based and so the links between discrete and continuous CSP variants needs to be considered to allow the use of these languages in a co-simulation framework. Again, this is a big motivation for the creation of INTO-CSP. The semantic model of CircusTime or CML can thus be applied to give a semantics to the real-time CPUs and threads of VDM-RT. We will model e...
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Related to VDM-RT in the UTP

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